[논문]Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications

Ryu, Keun-Kwan; Kim, Yong-Hwan; Kim, Sung-Chan

doi:10.6109/jicce.2017.15.2.112

Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications 원문보기

Journal of information and communication convergence engineering, v.15 no.2, 2017년, pp.112 - 116

Ryu, Keun-Kwan (Department of Electronics and Control Engineering, Hanbat National University) , Kim, Yong-Hwan (RFIC) , Kim, Sung-Chan (Department of Electronics and Control Engineering, Hanbat National University)

Abstract ▼ AI-Helper

In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.

주제어

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문제 정의

In this paper, we reported our demonstration of a low noise and high linearity LNA MMIC with novel active bias circuit for LTE applications. The device technology used relies on a 0.

제안 방법

1. The design strategy was optimized for simultaneous low noise and high linearity performance.
The proposed active bias circuit was composed of a PHEMT-based diode, an inductor, and a capacitor as a linearizer to improve the linearity. An inductor (L2) and capacitor (C2) connected in series were set to bypass unwanted frequency components using a choke inductor (L1) and a bypass capacitor (C1) connected in parallel at the DC bias feed line, which decreases third order intermodulation (IM3) components from the PHEMT devices with cascode configuration.

대상 데이터

The LNA MMIC with novel active bias circuit was designed using the 0.25 μm AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) MMIC library by the Wireless Information Networking (WIN) Semiconductor foundry.
The fabricated LNA MMIC was packaged in an industry standard Quad Flat Nolead (QFN) 3 mm × 3 mm plastic package.
In order to obtain high linearity, which is usually evaluated using the third order intermodulation intercept point (IP3); we proposed a novel active bias circuit. The proposed circuit is composed of a PHEMT-based diode, a capacitor, and an inductor as a linearizer. It improves the linearity performance without degradation of the LNA MMIC.

성능/효과

From the EM simulation results, the OIP3 of over 38 dBm, a NF of under 0.5 dB, and a small signal gain of over 18 dB were obtained in the frequency range 1.75–2.65 GHz.
The results from this work indicate the best performance demonstrated from a LNA MMIC employing GaAs-based HEMTs from 1.75–2.65 GHz, in terms of the NF, as well as the OIP3 characteristics.

참고문헌 (13)

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상세보기
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상세보기
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상세보기
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Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications 원문보기

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Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications 원문보기

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