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Grant-Aware Scheduling Algorithm for VOQ-Based Input-Buffered Packet Switches

ETRI journal, v.40 no.3, 2018년, pp.337 - 346  

Han, Kyeong-Eun (Hyper-connected Communication Research Laboratory, ETRI) ,  Song, Jongtae (Hyper-connected Communication Research Laboratory, ETRI) ,  Kim, Dae-Ub (Hyper-connected Communication Research Laboratory, ETRI) ,  Youn, JiWook (Hyper-connected Communication Research Laboratory, ETRI) ,  Park, Chansung (Hyper-connected Communication Research Laboratory, ETRI) ,  Kim, Kwangjoon (Hyper-connected Communication Research Laboratory, ETRI)

Abstract AI-Helper 아이콘AI-Helper

In this paper, we propose a grant-aware (GA) scheduling algorithm that can provide higher throughput and lower latency than a conventional dual round-robin matching (DRRM) method. In our proposed GA algorithm, when an output receives requests from different inputs, the output not only sends a grant ...

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제안 방법

  • Using the OPNET simulator, we examined the performance of the proposed GA scheduling algorithm in terms of the throughput and average queuing delay, and we compared them with those of DRRM. For the simulation, we assumed a 30 9 30 switch, whose scheduling time is within one time slot.
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참고문헌 (26)

  1. A. Bach, "High Speed Networking and the Race to Zero," in Proc. IEEE Symp. High Perform. Interconnects, New York, USA, Aug. 25-27, 2009, p. 15. 

  2. Juniper Networks, Network Fabrics for the Modern Data Center, White Paper, Juniper Networks, Inc., 2010. 

  3. S. Liu, Q. Cheng, M.R. Madarbux, A. Wonfor, R.V. Penty, I.H. White, and P.H. Watts, "Low Latency Optical Switch for High Performance Computing with Minimized Processor Energy Load [invited]," IEEE/OSA J. Opt. Commun. Netw., vol. 7, no. 3, Mar. 2015, pp. A498-A510. 

  4. K. Chen et al., "OSA: An Optical Switching Architecture for Data Center Networks With Unprecedented Flexibility," J. IEEE/ACM Trans. Netw. (TON), vol. 22, no. 2, Apr. 2014, pp. 498-511. 

  5. A. Singh et al., "Jupiter Rising: A Decade of Clos Topologies and Centralized Control in Google's Datacenter Network," ACM SIGCOMM Comput. Commun. Rev., vol. 45, no. 4, Oct. 2015, pp. 183-197. 

  6. L. Liu, Z. Zhang, and Y. Yang, "Packet Scheduling in a Low-Latency Optical Interconnect with Electronic Buffers," J. Lightw. Technol., vol. 30, no. 12, 2012, pp. 1869-1881. 

  7. I. Iliadis and C. Minkenberg, "Performance of a Speculative Transmission Scheme for Scheduling-Latency Reduction," IEEE/ACM Trans. Netw., vol. 16, no. 1, Feb. 2008, pp. 182-195. 

  8. N. Farrington et al., "Helios: A Hybrid Electrical/Optical Switch Architecture for Modular Data Centers," in Proc. ACM SIGCOMM 2010 Conf. Data Commun., New Delhi, India, Aug. 30-Sept. 3, 2010, pp. 339-350. 

  9. K. Naxhimoto et al., "High-Speed PLZT Optical Switches for Burst and Packet Switching," Proc. Int. Conf. Broadband Netw., Boston, MA, USA, Oct. 7, 2005, pp. 1118-1123. 

  10. M. Fiorani, S. Aleksic, and M. Casoni, "Hybrid Optical Switching for Data Center Networks," J. Electr. Comput. Eng., vol. 2014, Jan. 2014, pp. 1-11. 

  11. D. Shah and M. Kopikare, "Delay Bounds for Approximate Maximum Weight Matching Algorithms for Input Queued Switches," in Proc. IEEE INFOCOM'02, New York, USA, June 23-27, 2002, pp. 1024-1031. 

  12. H.J. Chao and B. Liu, High Performance Switches and Routers, Hoboken, NJ, USA: John Wiley & Sons Inc, 2007. 

  13. N. McKeown, V. Anantharam, and J. Walrand, "Achieving 100% Throughput in an Input-Queued Switch," in Proc. IEEE INFOCOM '96, San Francisco, CA, USA, Mar. 24-28, 1996, pp. 296-302. 

  14. A. Mekkittikul and N. McKeown, "A Practical Scheduling Algorithm for Achieving 100% Throughput in Input- Queued Switches," in Proc. INFOCOM '98, San Francisco, CA, USA, Mar. 29-Apr. 2, 1998, pp. 792-799. 

  15. Y. Tamir and G. Frazier, "High Performance Multi-queue Buffers for VLSI Communication Switches," in Proc. Annu. Symp. Comput. Arch., Honolulu, HI, USA, May 30-June 2, 1988, pp. 343-354. 

  16. S. Li and N. Ansari, "Scheduling Input-Queued ATM Switches with QoS Features," Proc. Int. Conf. Comput. Commun. Netw., Lafayette, LA, USA, Oct. 15, 1998, pp. 107-112. 

  17. D. Cavendish, M. Goudreau, and A. Ishii, "On the Fairness of Scheduling Algorithms for Input-Queued Switches," Teletraf?c Sci. Eng., vol. 4, Dec. 2001, pp. 829-841. 

  18. S. Li, J.-G. Chen, and N. Ansari, "Fair Queueing for Input-Buffered Switches With Back Pressure," IEEE Int. Conf. ATM, Colmar, France, June 22-24, 1998, pp. 252-259. 

  19. T.E. Anderson, S.S. Owicki, J.B. Saxe, and C.P. Thacker, "High Speed Switch Scheduling for Local Area Networks," ACM Trans. Comput. Syst., vol. 11, no. 4, Nov. 1993, pp. 319-352. 

  20. N. McKeown, P. Varaiya, and J. Warland, "Scheduling Cells in an Input-Queued Switch," Electron. Lett., vol. 29, no. 25, Dec. 1993, pp. 2174-2175. 

  21. D.N. Serpanos and P.I. Antoniadis, "FIRM: A Class of Distributed Scheduling Algorithms for High-Speed ATM Switches with Multiple Input Queues," in Proc. IEEE INFOCOM'00, Tel Aviv, Isreal, Mar. 26-30, 2000, pp. 548-554. 

  22. N. McKeown, "The iSlip Scheduling Algorithm for Input- Queued Switches," IEEE/ACM Trans. Netw., vol. 7, no. 2, Apr. 1999, pp. 188-200. 

  23. H. Chao and J. Park, "Centralized Contention Resolution Schemes for a Large-Capacity Optical ATM Switch," in Proc. IEEE ATM Workshop, Fairfax, VA, USA, May 26-29, 1998, pp. 11-16. 

  24. H.J. Chao, "Saturn: A Terabit Packet Switch Using Dual Round-Robin," IEEE Commun. Mag., vol. 38, no. 12, Dec. 2000, pp. 78-84. 

  25. C. Minkenberg, F. Abel, P. Muller, R. Krishnamurthy, M. Gusat, and B.R. Hemenway, "Control Path Implementation for a Low-Latency Optical HPC Switch," in Proc. Symp. High Perform. Interconnects, Stanford, CA, USA, Aug. 17-19, 2005, pp. 29-35. 

  26. S. McCreary and K.C. Claffy, "Trends in Wide Area IP Traf?c Patterns," Cooperative Association for Internet Data Analysis, USA, Accessed 2017. http://www.caida.org 

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