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Method of forming an integrated circuit assembly 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/56
출원번호 US-0534919 (1974-12-20)
발명자 / 주소
  • Coucoulas Alexander (Bridgewater Township
  • Somerset County NJ)
출원인 / 주소
  • Western Electric Company, Inc. (New York NY 02)
인용정보 피인용 횟수 : 42  인용 특허 : 0

초록 ▼

A method of forming an integrated circuit assembly is disclosed. The method comprises selectively treating a surface of a carrier to delineate a pattern thereon capable of receiving a metal deposit. The pattern is contacted with a conductive lead of an integrated circuit. The pattern is also contact

대표청구항 ▼

A method of forming an integrated circuit assembly, which comprises: a. selectively treating a surface of a carrier to delineate a pattern thereon capable of receiving a metal deposit; b. contacting said pattern with a conductive lead of an integrated circuit; c. contacting said contacted pattern wi

이 특허를 인용한 특허 (42)

  1. Wang, Jenn-Yue; Chung, Hua; Tao, Rong; Zhang, Hong, Bottom up plating by organic surface passivation and differential plating retardation.
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  2. Nakamura Yoshifumi,JPX ; Bessho Yoshihiro,JPX ; Itagaki Minehiro,JPX, Chip carrier.
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  3. Yoshifumi Nakamura JP; Yoshihiro Bessho JP; Minehiro Itagaki JP, Chip carrier and method of manufacturing and mounting the same.
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  4. Weng, Chaofu; Wu, Yi Ting, Chip package structure and manufacturing methods thereof.
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  5. Lee, Chang-Chi; Chen, Shih-Kuang; Chang, Yuan-Ting, Chip package structure and method of manufacturing the same.
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  6. Nakagawa,Tatsuya, Component mounting circuit board with resin-molded section covering circuit pattern and inner components.
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  7. Lee, Chun-Che; Su, Yuan-Chang; Lee, Ming Chiang; Huang, Shih-Fu, Embedded component device and manufacturing methods thereof.
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  8. Su, Yuan-Chang; Huang, Shih-Fu; Lee, Ming-Chiang; Wang, Chien-Hao, Embedded component substrate and manufacturing methods thereof.
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  9. Hsieh Wen-Lo,TWX, Frame for manufacturing encapsulated semiconductor devices.
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  10. Reifel Harry C. (Topsfield MA) Erdag Eren (Somerville MA) Soerewyn Herman V. D. (Peabody MA), Hermetically sealed, surface mountable component and carrier for semiconductor devices.
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  11. Matsubayashi Hiroto (Tokyo JPX) Goto Kei (Tokyo JPX) Notani Yoshihiro (Tokyo JPX) Ohta Yukio (Tokyo JPX) Inoue Akira (Tokyo JPX) Nakajima Yasuharu (Tokyo JPX), Integrated circuit device.
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  12. Cohn Charles (Wayne NJ), Integrated circuit package using plastic encapsulant.
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  13. Tsuda, Motoji, Manufacturing method of electronic component.
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  14. Fukasawa, Norio; Kawahara, Toshimi; Morioka, Muneharu; Osawa, Mitsunada; Shinma, Yasuhiro; Matsuki, Hirohisa; Onodera, Masanori; Kasai, Junichi; Maruyama, Shigeyuki; Sakuma, Masao; Suzuki, Yoshimi; T, Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device.
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  15. Yoshifumi Nakamura JP; Yoshihiro Bessho JP; Minehiro Itagaki JP, Method for manufacturing electronic device with resin layer between chip carrier and circuit wiring board.
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  16. Shaheen Joseph M. (La Habra CA) Simone John (Anaheim CA), Method of fabricating multi-layer board.
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  17. Komathu Kathuzi (Kawagoe JPX), Method of molding a protective cover on a pin grid array.
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  18. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out.
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  19. Eshleman, Craig Clay; Wetzel, Charles Michael; McCoy, Randall Eugene; Kriksunov, Leo B.; Benjamin, Lance; Harris, Derek; Sage, Thomas R., Method utilizing a magnetic assembly during etching thin shadow masks.
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  20. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng, Package carrier, semiconductor package, and process for fabricating same.
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  21. Komathu Kathuzi (Kawagoe JPX), Pin grid array package.
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  22. Sawai Akiyoshi (Hyogo JPX) Shimamoto Haruo (Hyogo JPX) Tachikawa Toru (Hyogo JPX) Shibata Jun (Hyogo JPX), Plastic molded semiconductor package.
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  23. Sawai Akiyoshi,JPX ; Shimamoto Haruo,JPX ; Tachikawa Toru,JPX ; Shibata Jun,JPX, Plastic molded semiconductor package and method of manufacturing the same.
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  24. Sawai Akiyoshi,JPX ; Shimamoto Haruo,JPX ; Tachikawa Toru,JPX ; Shibata Jun,JPX, Plastic molded semiconductor package and method of manufacturing the same.
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  25. Sawai Akiyoshi,JPX ; Shimamoto Haruo,JPX ; Tachikawa Toru,JPX ; Shibata Jun,JPX, Plastic molded semiconductor package and method of manufacturing the same.
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  26. Oka, Seiji; Obiraki, Yoshiko; Oi, Takeshi, Power semiconductor module.
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  27. King,Jerrold L.; Brooks,Jerry M., Semiconductor chip package.
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  28. Hsieh, Chuehan; Yang, Hung-Jen; Huang, Min-Lung, Semiconductor device package with an alignment mark.
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  29. Ding, Yi-Chuan; Chen, Chia-Ching, Semiconductor device packages including connecting elements.
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  30. Ding, Yi-Chuan; Chen, Chia-Ching, Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof.
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  31. Yang, Hung-Jen; Hsieh, Chuehan; Huang, Min-Lung, Semiconductor device packages, redistribution structures, and manufacturing methods thereof.
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  32. Gilton, Terry L.; Li, Li, Semiconductor fabrication apparatus.
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  33. Chen, Chia-Ching; Ding, Yi-Chuan, Semiconductor package including a stacking element.
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  34. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
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  35. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
    상세보기
  36. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
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  37. Chen, Chia-Ching; Ding, Yi-Chuan, Stackable semiconductor package and manufacturing method thereof.
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  38. Lee, Dong-Weon; Li, Guangyong, Stretchable circuit board and method of manufacturing the same.
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  39. Hunt, John Richard, Wafer level semiconductor package and manufacturing methods thereof.
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  40. Hunt, John Richard, Wafer level semiconductor package and manufacturing methods thereof.
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  41. Chiu, Chi-Tsung; Liao, Kuo-Hsien; Yih, Wei-Chi; Chen, Yu-Chi; Fan, Chen-Chuan, Wafer-level semiconductor device packages with electromagnetic interference shielding.
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  42. Lee, Ming-Chiang; Wang, Chien-Hao, Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof.
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