[특허]Constant false alarm rate (CFAR) circuitry for minimizing extraneous target sensitivity

Constant false alarm rate (CFAR) circuitry for minimizing extraneous target sensitivity 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G01S-007/30
출원번호	US-0587171 (1975-06-16)
발명자 / 주소	Perry Richard Prather (Haddon Heights NJ) Urkowitz Harry (Philadelphia PA)
출원인 / 주소	The United States of America as represented by the Secretary of the Navy (Washington DC 06)
인용정보	피인용 횟수 : 23 인용 특허 : 0

초록 ▼

CFAR systems may become ineffective when extraneous targets present in threshold control cells raise the threshold detection level to such a point that the target in the cell being tested becomes obscured. The present circuitry locates the particular threshold control cell or cells having the extran

대표청구항 ▼

A signal processor for establishing an environment threshold level for determining the presence of a target-strength signal in an incoming series of signals, comprising: first, second and third signal-advancing delay line means each having a plurality of output taps forming each line into a plurality of spaced sequeNtially-arranged cells, all of said lines being adapted to receive a signal input in a first cell and advance said input from tap to tap at the same rate whereby said lines are formed of numerically-counterpart cells, said first delay line being receivably-coupled to said incoming signal series and at least one cell of said first and third lines being used as a ‘test’cell while the other cells of said two lines are ‘control’cells, signal-generating sampling means coupled to the output taps of said ‘test’and ‘control’cells of said first delay line for comparing the signal strength of the ‘test’cell against that of the ‘control’cells and generating as an output an ‘inhibit’signal when said ‘test’cell strength exceeds that of the ‘control’cells; said ‘test’and ‘control’cell samplings and comparisons being performed synchronously with the advance rate of said delay lines, said second delay line being coupled to the output of signal-generating sampling means and said third line to said ‘test’cell output of said first line whereby an ‘inhibit’signal derived from any one of said samplings is received by said first cell of said second line simultaneously with the reception of a relatively high target-like signal in the first cell of said third line, said rate of advance of said lines advancing said entered signals simultaneously through said numerical counterpart cells of both of said lines, coincidence gates coupling the outputs of the ‘control’cells of said third line with the outputs of said numerical counterparts of said second inhibit signal line, a third delay line averaging means coupled to said coincidence gates for providing as an output an average of said third line control cell outputs, and detection means coupled to the output of said averaging means and said third delay line ‘test’cell for comparing said outputs and determining when said ‘test’cell output exceeds said ‘control’cell average, said coincidence gates blocking passage of a third delay line ‘control’cell signal into said averaging means when an ‘inhibit’signal is present in its numerical counterpart second line cell, whereby said averaging means can provide a truer environmental average unaffected by extraneous relatively high signal strengths present in the ‘control’cells of said third line.

이 특허를 인용한 특허 (23)

Di Domizio John A. (Norwalk CT) Briechle George T. (Monroe CT) Ell Douglas (West Hartford CT), AMTI target/clutter discriminator.
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Huang Stanley S. (Bellevue WA), Correlation match filter for passive signal detection.
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Penhard Serge J. (Paris FRX), Device for the elimination of nth trace moving echoes and interference echoes in a radar.
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Poston Billy R. (St. Petersburg FL) Atkinson Stuart L. (St. Petersburg FL), Digital pulse detector circuit having selectable false alarm rate.
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Colbert Richard P. (East Meadow NY) Dimitriou George (East Northport NY) Jones Max E. (Northport NY) Haberman Jack I. (Plainview NY), Digital radar signal processor.
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Donahue ; Thomas H. ; Chaney ; John F., Extended target-log CFAR processor.
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Stockmann, Peter H., Method and apparatus for radar surveillance and detection of sea targets.
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Urkowitz, Harry; Cammerata, Jeff D., Method for deblurring radar range-doppler images.
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Nathan Robert (Pasadena CA), Pipeline active filter utilizing a booth type multiplier.
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Phipps Joe (Westminster MD) Thurber Robert E. (Silver Spring MD) Prengaman Richard J. (Severna Park MD), Radar video converter.
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Ma,Yugang; Sun,Xiaobing; Xu,Jin; Okada,Kanzo, System and method for determining position of radar apparatus based on reflected signals.
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Lohmeier,Stephen P.; Wimmer,Wilson J., System and method for generating a radar detection threshold.
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Kelly, Jr., Thomas M.; Aeder, R. Gregory; Woodington, Walter Gordon, System and method for reducing the effect of a radar interference signal.
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Lohmeier,Stephen P.; Liu,Yong, System and method for verifying a radar detection.
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Chen Pin-Wei (Sunnyvale CA), Target discrimination apparatus.
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LeGrand Jesse S. (Clifton NJ), Threshold circuit.
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Bergman Jan (Haaksbergen NLX), Threshold circuit for radar video data.
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Bleijerveld Hendrik C. (Borne NLX) Oude Elberink Bernard H. M. (Oldenzaal NLX), Threshold circuit for radar video signals.
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Platt ; Vernon H. ; Wilmot ; Richard D., Tracking feedback clutter mapper control device.
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Taylor ; Jr. John W. (Baltimore MD), Two parameter clutter map.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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연합인증

Constant false alarm rate (CFAR) circuitry for minimizing extraneous target sensitivity 원문보기

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Constant false alarm rate (CFAR) circuitry for minimizing extraneous target sensitivity 원문보기

초록 ▼

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연구과제 타임라인

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