초록 ▼

An improved method of operating a digital timer using line currents of different frequencies such as 50 and 60 hertz. The line current is rectified and converted into square wave pulses at the line current frequency. Upon actuation of a start switch to initiate the timing cycle, the logic circuitry

An improved method of operating a digital timer using line currents of different frequencies such as 50 and 60 hertz. The line current is rectified and converted into square wave pulses at the line current frequency. Upon actuation of a start switch to initiate the timing cycle, the logic circuitry is cleared and synchronized at the line current frequency. The square wave pulses are compared to internally generated clock pulses to determine the line current frequency, and then modified along parallel paths to provide pulses at various frequencies including timing pulses at a timing frequency of ten hertz. The timing interval may be manually or automatically externally established and counters are incremented by the timing pulses at the timing frequency of ten hertz. A comparator actuates a signal when the value in the counters equals the desired timing interval. A scale factor is provided to increase the capacity of the counters by decreasing the timing pulse frequency to 1 hertz. A visible display is provided which increments as the counters increment to provide an indication of the elapsed time. The digital timer circuitry includes a Schmitt trigger to square wave rectify the line current and a synchronization circuit which is actuated in response to an external signal to initiate the timing interval. The synchronization circuit clears the logic circuitry and sets the circuitry on the next square wave pulse to enable all subsequent square wave pulses to be converted into timing pulses to increment the counter. A differentiator circuit is provided to determine the line current frequency by determining the frequency of the square wave pulses and a frequency modification circuit operates in parallel paths to provide a plurality of pulses at different frequencies one of which is the ten hertz frequency. The differentiator circuit allows only the ten hertz pulses to increment the counter. A scaling circuit is provided to divide the timing frequency pulses of 10 hertz into reduced timing frequency pulses of 1 hertz thereby increasing the capacity of the counters. Comparators read the value in the counters and actuate a signal when the value in the counters equals the desired timing interval which, in turn, may be manually or automatically externally established. A visual display is coupled to the counters and increments with the counters to provide an indication of the elapsed time.

대표청구항 ▼

In a method of operating a digital timer on line currents of different frequencies, including half-wave rectifying the line current for converting the line current into square wave pulses, counting timing pulses in counters at a frequency different from the line current frequency by incrementing the

In a method of operating a digital timer on line currents of different frequencies, including half-wave rectifying the line current for converting the line current into square wave pulses, counting timing pulses in counters at a frequency different from the line current frequency by incrementing the counters, and comparing the value in the counters with the desired timing interval to generate an output signal when the values in the counters equals the desired timing interval, and actuating a starting switch to clear the counters, the improvement comprising: initiating and synchronizing the incrementing of the counters by clearing the counters in response to the next square wave pulse and enabling all successive square pulses thereafter to be converted into timing pulses; then determining the frequency of the line current by determining the frequency of the square wave pulses; simultaneously modifying square wave pulses on parallel paths to provide output pulses at different frequencies, one of which equals the timing pulse frequency; and enabling only output pulses at the timing pulse frequency to increment the counters.