초록 ▼

A servo amplifier for d-c servo motors which converts the error signal into pulses which are amplified in a saturating amplifier to drive the motor. Both the duty cycle and the repetition rate of the pulses vary with the error signal. At large error signals the duty cycle is 100 percent, i.e., “full

A servo amplifier for d-c servo motors which converts the error signal into pulses which are amplified in a saturating amplifier to drive the motor. Both the duty cycle and the repetition rate of the pulses vary with the error signal. At large error signals the duty cycle is 100 percent, i.e., “full on”; at small error signals the duty cycle is low and the pulses spaced far apart. As the system approaches balance the pulses become shorter and less frequent, and the motor slows. The circuit comprises a signal integrator which drives two comparators, one for positive signals and the other for negative. The integrator generates a ramp voltage in a direction opposite to the polarity of its input, and is reset automatically by reset pulses of controlled and variable length when a comparator set point is reached. The reset pulses are the pulses which are amplified to drive the servo motor. In this system, reducing the gain does not produce a widened dead band, but only increases the time required for rebalance. The dead band is considerably more tightly controlled than in prior systems. A novel overload shutdown circuit cuts off the input to the power amplifiers when a large, off-scale input signal occurs for longer than a predetermined time.

대표청구항 ▼

A servo amplifier comprising: an input circuit; an integrator having an integrator input terminal cascaded thereafter and connected to deliver positive-going and negative-going output ramp voltages at an integrator output terminal; a positive-going signal comparator and a negative-going signal compa

A servo amplifier comprising: an input circuit; an integrator having an integrator input terminal cascaded thereafter and connected to deliver positive-going and negative-going output ramp voltages at an integrator output terminal; a positive-going signal comparator and a negative-going signal comparator, both cascaded after said integrator with their inputs in parallel, and each having comparator output terminals; a positive and a negative reset circuit, each cascaded after one of said comparators respectively; a reset bus connected to said integrator input terminal and connected to both of said reset circuits to deliver reset current of either polarity thereto; and pulse signal paths from each said comparator output terminal respectively to power amplifier input terminals of a positive and a negative signal power amplifier to produce motor-driving pulses, both said power amplifiers having a common output terminal; and servo motor means drivably connected to said common output terminal, said reset current reversing said ramp voltage and driving it from a predetermined set-point level back toward zero during a reset interval, and said motor-driving pulses substantially occupying each said reset interval.