초록 ▼

A bank of counters is clocked at a relatively high repetition frequency by a clock oscillator. Each counter separately produces a sequence of digital signals which are transmitted at the clock oscillator frequency by a latch and a decoder/driver associated with the counter to a numeric display also

A bank of counters is clocked at a relatively high repetition frequency by a clock oscillator. Each counter separately produces a sequence of digital signals which are transmitted at the clock oscillator frequency by a latch and a decoder/driver associated with the counter to a numeric display also associated with the counter. Consequently, the digital signals produced by each counter are separately displayed at the clock oscillator frequency. This frequency is sufficiently high to prevent recognition of a number on the display. A bank of manually operable momentary switches is associated with each latch. A brief audible tone is produced whenever a switch is operated. When operated, the switch temporarily disables the associated latch for a preselected interval of time. When disabled, the latch transmits only the digital signal currently stored in the latch to the display for the preselected interval of time. The preselected interval of time is sufficiently long to allow operator recognition of the number displayed. During the preselected interval of time, each counter continues to produce its sequence of digital signals. At the end of the preselected interval of time, the latch automatically resumes transmission of the digital signals produced by the associated counter to the display at the clock oscillator frequency.

대표청구항 ▼

Apparatus, comprising: at least one clock oscillator for generating a clock signal having a preselected repetition frequency, plural display channels associated with said clock oscillator, plural switches associated with said display channels, each of said switches being operatively associated with

Apparatus, comprising: at least one clock oscillator for generating a clock signal having a preselected repetition frequency, plural display channels associated with said clock oscillator, plural switches associated with said display channels, each of said switches being operatively associated with one of said display channels, each of said plural display channels comprising at least one counter for generating a sequence of digital signals at said preselected repretition frequency in response to said clock signal, display means for sequentially displaying indicia corresponding to said digital signals, at least one latch for transmitting said digital signals to said display means, and latch control means for generating a latch control pulse having a preselected time interval Ti in response to operation of the switch associated with the display channel for causing said latch to halt the sequential transmission of said digital signals to said display means at said preselected repetition frequency and to transmit only one of said digital signals to said display means for said preselected interval of time Ti following operation of said switch associated with the display channel and for causing said latch to resume transmitting said sequence of digital signals to said display means at the end of said preselected interval of time Ti, said preselected repetition frequency preventing visual recognition of individual indicia displayed by said display means at the preselected repetition frequency, said preselected interval of time Ti permitting visual recognition of individual indicia displayed by said display means during the preselected interval of Ti, and said switches and display channels being constructed and arranged such that operation of said switches in sequence causes said plural display channels to simultaneously display said visually recognizable individual indicia during the time that the latch control pulse generated in the display channel associated with the last operated switch and the latch control pulse generated in the display channel associated with the first operated switch overlap. A method, comprising: generating at least one clock signal having a preselected repetition frequency, generating plural sequences of digital signals each at said preselected repetition frequency in response to said clock signal, displaying indicia corresponding to each of said plural sequences of digital signals at said preselected repetition frequency, said preselected repetition frequency preventing visual recognition of individual indicia, successively generating pulses having time intervals T1 and T2 respectively, successively halting the display of said indicia corresponding to one of said plural sequences of digital signals for a time interval T1 and the display of said indicia corresponding to another of said plural sequences of digital signals for a time interval T2, and displaying indicia corresponding to one of said digital signals of one of said plural sequences of digital signals and one of said digital signals of another of said plural sequences of digital signals during the time that said preselected intervals of time T1 and T2 overlap, said time during which said intervals T1 and T2 overlap permitting visual recognition of said indicia.