초록 ▼

The architecture of a conventional digital computer, for example, a microprocessor, is modified by interposing a multiplexer (31), a logic array (32) and a demultiplexer (33) between the instruction register (17) and instruction decoder (18). The logic array “scrambles”the bits in each instruction c

The architecture of a conventional digital computer, for example, a microprocessor, is modified by interposing a multiplexer (31), a logic array (32) and a demultiplexer (33) between the instruction register (17) and instruction decoder (18). The logic array “scrambles”the bits in each instruction code; however, if the program to be run is priorly encrypted with this “scrambling”in mind, it will run normally. On the other hand, if the encrypted program is copied, the copied program will not run on an unmodified computer.

대표청구항 ▼

An improved electronic digital computer comprising: an internal data bus; a register array coupled to said internal bus and including a plurality of general purpose data registers; an accumulator connected to said internal data bus; an arithmetic logic unit connected to said accumulator and to said

An improved electronic digital computer comprising: an internal data bus; a register array coupled to said internal bus and including a plurality of general purpose data registers; an accumulator connected to said internal data bus; an arithmetic logic unit connected to said accumulator and to said internal data bus for performing logical operations on the data stored in said accumulator and in said general purpose registers; an instruction register connected to said internal data and adapted to receive program instruction codes; and an instruction decoder connected to said instruction register and responsive to selected ones of said program instruction codes, WHEREIN THE IMPROVEMENT COMPRISES means, within the electronic digital computer, interposed between said instruction register and said instruction decoder, for selectively transforming the bit pattern of a program instruction code into a second instruction code thereby enabling said computer to selectively respond to sequences of program instruction codes which have priorly been encrypted as instruction codes in non-standard format.