Series-connected two-terminal semiconductor devices and their fabrication
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/265
H01L-021/283
H01L-021/308
출원번호
US-0206680
(1980-11-13)
우선권정보
GB-0039564 (1979-11-15)
발명자
/ 주소
Ball Geoffrey (Sandy GB2) Deadman Harry A. (Clifton Shefford GB2) Smith John G. (Biggleswade GB2) Vokes John C. (Harpenden GB2)
출원인 / 주소
The Secretary of State for Defence in Her Britannic Majesty\s Government of the United Kingdom of Great Britain and Northern Ireland (London GB2 07)
인용정보
피인용 횟수 :
13인용 특허 :
7
초록▼
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material, 4, on the surface of a temporary substrate, 2 and 3, to provide active areas for the devices, forming first contact p
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material, 4, on the surface of a temporary substrate, 2 and 3, to provide active areas for the devices, forming first contact pattern conductors, 6, 9, 10, on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate, 12, to the first contact pattern, removing the temporary substrate, forming second contact pattern conductors, 17, 18, 19, on the other surface of the high quality layer to provide a separate second contact to this layer for each of the devices, removing regions, 8, of the high quality layer separating the conductors of a pattern at any stage after beginning formation of the first contact pattern in order to define the device active areas so that parts of the first contact pattern are exposed when both the temporary substrate and the regions of the high quality layer have been removed, and providing interconnections between the exposed parts, 10, of the first contact pattern and parts of the second contact pattern, whereby to connect the devices in series. Also any series-connected combination of two-terminal semiconductor devices fabricated according to the inventive method.
대표청구항▼
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising the steps of: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices the layer having a first
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising the steps of: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices the layer having a first free surface not in contact with the temporary substrate, forming first contact pattern conductors on the free surface of said high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate to said first contact pattern, removing said temporary substrate to expose a second surface of the high quality semiconductor material, forming second contact pattern conductors on the second surface of said high quality layer to provide a separate second contact to this layer for each of the devices, removing regions of the high quality layer separating the conductors of one of said patterns at any step of the method after beginning formation of said first contact pattern thereby defining said device active areas and exposing parts of said first contact pattern when both the temporary substrate and said regions of the high quality layer have been removed such that both said first and said second contacts are accessable from the same side of said devices, and providing interconnections between the exposed parts of said first contact pattern and parts of said second contact pattern, whereby to connect the devices in series. A method of fabricating a series connected combination of two-terminal semiconductor devices on a common substrate comprising fabricating a first precursor by the following procedure: forming a layer of high quality semiconductor material on the surface of a temporary substrate to provide active areas for the devices, forming first contact pattern conductors on the free surface of said high quality semiconductor layer to provide a separate first contact to this layer for each of the devices thereon, bonding an insulating support substrate overlayed by a conducting interconnection pattern to said first contact pattern so as to provide contact between said first and the interconnection patterns, removing said temporary substrate, forming second contact pattern conductors on the other surface of said high quality layer to provide a separate second contact to this layer for the devices thereon, at any stage after high quality semiconductor layer formation removing regions of this layer which separate a contact pattern\s conductors so as to form isolated regions sandwiched between said first and second contact pattern conductors, fabricating a second precursor by the same procedure as that used for said first precursor, and bonding said first and second precursors together so as to provide contact between the second contact pattern of the one and the interconnection contact pattern of the other.
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