초록 ▼

A memory unit having a multiplicity of storage locations for the temporary storage of series of groups of data signals. When the data groups are being stored in a memory location, index signals are developed that not only identify the location of the stored signal group, but when applied to the memo

A memory unit having a multiplicity of storage locations for the temporary storage of series of groups of data signals. When the data groups are being stored in a memory location, index signals are developed that not only identify the location of the stored signal group, but when applied to the memory unit cause the data group to be withdrawn from the memory unit. The memory unit is comprised of a first addressable multiplicity of storage locations; a second addressable multiplicity of storage locations, the contents of the second multiplicity of storage locations adapted for addressing the first multiplicity of storage locations, a counter for addressing the second multiplicity of storage locations; and control logic for controlling the counter and entry and withdrawal of data signals in the first and second multiplicity of storage locations. The second multiplicity of storage locations contain the index signals that are also the addresses of the related data signal groups in the first multiplicity of storage locations. As data signal groups are withdrawn from a first storage location in response to application of index signals, a second storage location stores the address (i.e., the index signal of the first storage location not available for storage of a data signal group). The storage of a data signal group with the concurrent development of index signals, or the withdrawal of the data signal groups can be accomplished in one clock cycle. In addition, a simultaneous storage and withdrawal of data signal groups can be accomplished in one system clock cycle.

대표청구항 ▼

In association with a data processing system, a memory unit for temporary storage of data signal groups comprising: a first group of storage locations for storing said data signal groups, a second group of storage locations coupled to said first group of storage locations, each storage location of s

In association with a data processing system, a memory unit for temporary storage of data signal groups comprising: a first group of storage locations for storing said data signal groups, a second group of storage locations coupled to said first group of storage locations, each storage location of said second group of storage locations storing an address value corresponding to a storage location of said first group of storage locations; counter means for addressing said second group of storage locations; and control apparatus generating control signal sets for said memory unit in response to signals from said data processing system, wherein a first control signal set causes a first data signal group from said data processing system to be entered in a first storage location of said first group of storage locations, said first storage location being identified by a first address value stored in a first location of said second group of storage locations, said first location of said second group of storage locations being identified by a first counter value contained in said counter means, said first address value stored in said first location of said second group of storage locations being coupled to said data processing system, and wherein a second control signal set causes a second data signal group stored in a second location of said first group of storage locations to be coupled to said data processing system by a second address value coupled by said data processing system to said first group of storage locations, said second address value coupled by said data processing system being stored concurrently in a second location of said second group of storage locations, said second location being determined by a second counter value of said counter means.