초록 ▼

A multiplex wiring system including a plurality of data line (n) from which (n2-n) load devices may be either independently or simultaneously energized. The system includes a synchronizing unit for applying an enabling voltage to each data line in sequence which applies a deactivating voltage to the

A multiplex wiring system including a plurality of data line (n) from which (n2-n) load devices may be either independently or simultaneously energized. The system includes a synchronizing unit for applying an enabling voltage to each data line in sequence which applies a deactivating voltage to the remaining lines. A transmitter and a receiver gate of substantially the same electronic circuit configuration are provided for each load and are connected to two of the data lines to be simultaneously enabled. The transmitter gate is activated by closure of an associated switch and overrides the deactivating input to its associated receiver which is thereby activated to energize the associated load. Each load device has associated therewith means for maintaining the load in an energized state during the time interval when its associated transmitter and receiver gates are disabled by the synchronizing unit.

대표청구항 ▼

An electrical system for controlling (n2-1) load devices said system comprising a plurality of data lines (n), synchronizing means for applying an enabling voltage for a predetermined time interval to each of said data lines in sequence while applying a deactivating voltage to the remaining data lin

An electrical system for controlling (n2-1) load devices said system comprising a plurality of data lines (n), synchronizing means for applying an enabling voltage for a predetermined time interval to each of said data lines in sequence while applying a deactivating voltage to the remaining data lines, load control means associated with each of said load devices and including receiver gate means, transmitter gate means, and a manually actuable switch means, said receiver gate means and transmitter gate means having first and second inputs, said receiver gate means and said transmitter gate means adapted to be activated in response to concurrent application of an enabling voltage to its first input and an activating voltage to its second input, the first input of said receiver gate means connected to a first data line, the second input of said receiver gate means connected with a second line whereby said receiver gate means is periodically enabled but simultaneously deactivated by said synchronizing means, the first input of said transmitter gate means connected to said first data line and the second input of said transmitter gate means connected with said switch means whereby said transmitter gate means is enabled by said synchronizing means simultaneously with said receiver gate means, said switch means adapted to apply an activating voltage to said second input of said transmitter means in response to operation thereof, said transmitter gate means responsive to operation of said switch means for overriding the deactivating voltage and applying an activating voltage to said second data line to activate the receiver gate means, means for energizing a load device in response to activation of said receiver gate means, memory means associated with each of said load devices for maintaining energization of its associated load device for an interval of time at least as long as that existing between successive applications of said enabling voltage to said receiver and transmitter gate means.