초록 ▼

A technique and apparatus for storing data and addressing stored data in a memory from which multiple words of data are to be retrieved in parallel is disclosed. The memory is addressed by providing the address of the first of N consecutive words to be retrieved in parallel. The data is stored in me

A technique and apparatus for storing data and addressing stored data in a memory from which multiple words of data are to be retrieved in parallel is disclosed. The memory is addressed by providing the address of the first of N consecutive words to be retrieved in parallel. The data is stored in memory in physical data words which contain N logical data words such that the addressing of one physical data word will result in N logical data words being read in parallel from the memory. Each physical data word contains the contents of the logical data word having the same address as that of the physical data word in its leftmost position followed in the next right position by the contents of the logical data word having the next higher address, and so on until the rightmost position of the physical data word contains the contents of the logical data word with an address equal to the physical data word address plus N-1. This results in the contents of each logical data word being stored N times in the memory, but eliminates the need for data alignment as the N logical data words are read in parallel from the memory.

대표청구항 ▼

A memory for retrieving N multiple consecutive logical words of data in parallel, said memory comprising: A. a plurality of physical words of data, each of said plurality of physical words of data being of a length sufficient to contain N of said logical words of data; B. addressing means for addres

A memory for retrieving N multiple consecutive logical words of data in parallel, said memory comprising: A. a plurality of physical words of data, each of said plurality of physical words of data being of a length sufficient to contain N of said logical words of data; B. addressing means for addressing a specified one of said plurality of physical words of data by using an address of a first of said N multiple consecutive logical words of data to be read from said memory, said memory having stored therein N multiple copies of each of said logical words of data, except for a first and last N-1 logical words of data; and C. data output means for receiving said N multiple consecutive logical words of data from said specified one of said plurality of physical words of data read from said memory in the time required to read one of said physical words of data and wherein each of said physical words of data contains N multiple consecutive logical words of data having N consecutive logical addresses and wherein said first of said N multiple consecutive logical words of data has a logical address corresponding to a physical address of said physical word of data in which it is stored and whereby said reading of said N multiple consecutive logical words of data does not require any address incrementing or decrementing to read any group of said N multiple consecutive logical words of data and wherein a first through N-1 logical words of data, within any said group of said N multiple consecutive logical words of data as read from said memory, is located in the same relative position within said physical words of data without requiring any alignment of said logical words of data within said data output means.