초록 ▼

A supervisory control system for interrogating a large number of remote units. A pseudorandom sequence of bits are generated by central control in cycles and received by the remote units. Each remote unit is provided with a pseudorandom bit sequence generator. Upon coincidence of the pseudorandom bi

A supervisory control system for interrogating a large number of remote units. A pseudorandom sequence of bits are generated by central control in cycles and received by the remote units. Each remote unit is provided with a pseudorandom bit sequence generator. Upon coincidence of the pseudorandom bit sequence from the central control and the remote unit and upon detection of the address of remote unit and of the specific point in that remote unit, the remote unit sends back to the central control the status information of the selected point during the next succeeding bit time interval. In this manner the statuses of entire set of remote units are interrogated and reported. In accordance with a further aspect of the present control system, the control system commands the remote units for action and the remote units send back command acknowledge signals. This is accomplished by deviating from the pseudorandom bit sequence at the address of the desired point in a certain remote unit, reversing the next bit and repeating the same last n bit sequence for sending a command signal and the addressed remote unit receiving the two identical bit sequences and sending back command acknowledge signals.

대표청구항 ▼

A supervisory remote control system comprising: a plurality of remote units each having a predetermined number of status points, each status point having a respective status point address, said remote units being selectively responsive to reception of respective status point addresses, for transmitt

A supervisory remote control system comprising: a plurality of remote units each having a predetermined number of status points, each status point having a respective status point address, said remote units being selectively responsive to reception of respective status point addresses, for transmitting status information pertaining to an addressed status point, respectively; a central control means, coupled to said plurality of remote units via respective communication paths, for addressing the status point addresses of said remote units and for receiving transmitted status information from said remote units; said control means including status point address generating means for generating and transmitting to said remote units a cyclically continuous bit sequence, one bit at a time, having a plurality of successive cycles wherein each cycle exhibits an identical cyclic bit sequence having a cycle length of 2n-1 bits as does any other cycle, wherein n is the number of bits in each of said status point addresses, said cyclic bit sequence in each of said cycles being arranged such that 2n-1 distinct status point addresses, each comprised of n contiguous bits, are contained therein; each of said remote units including detecting means for detecting, after each successive bit in each cycle, whether a just received bit completes a respective status point address with n-1 contiguous bits immediately preceding said just received bit in said cyclically continuous bit sequence having a plurality of cycles, such that collectively said just received bit and said n-1 preceding bits comprise n contiguous bits constituting a status point address in said cyclically continuous bit sequence having a plurality of cycles, each of said remote units including response means, coupled to said detecting means, responsive to each detection by said detecting means of the completion of a respective status point address for transmitting indicia of the status of a status point, the address of which is detected as being completed by said just received bit, back to said control means during the next bit immediately following said just received bit, respectively.