초록 ▼

A virtual machine system having a virtual storage function, wherein registers are provided for holding the heading and trailing addresses of the continuous area in the main storage area assigned respectively for each of the plural operating systems. When the main storage area is accessed by a channe

A virtual machine system having a virtual storage function, wherein registers are provided for holding the heading and trailing addresses of the continuous area in the main storage area assigned respectively for each of the plural operating systems. When the main storage area is accessed by a channel or sub-channel, one of the registers is selected, and the heading address of the register selected is added to the main storage address sent from the channel or sub-channel. The added main storage address is compared with the trailing address in the selected register and if the former is smaller than the latter, the overhead for supporting the virtual storage area is reduced by accessing the main storage area in accordance with the added main storage address mentioned above.

대표청구항 ▼

A channel address control system for reducing the overhead for supporting the virtual storage function of a virtual machine system having a main storage area for storing data transfer instructions, channels for executing respective plural control programs, and a central processing unit for providing

A channel address control system for reducing the overhead for supporting the virtual storage function of a virtual machine system having a main storage area for storing data transfer instructions, channels for executing respective plural control programs, and a central processing unit for providing region identification information and for executing a monitor program for monitoring said plural control programs, said plural control programs being operated on the virtual machine system under the control of said monitor program, each of said channels providing a main storage address, continuous regions of the main storage area being exclusively assigned for access by corresponding ones of the plural control programs, respectively, each assigned continuous region being described by a heading address and a trailing address, comprising: at least one register for storing, as identifying information, the heading addresses and trailing addresses of the continuous regions of the main storage area assigned to respective ones of the control programs; transmission means, operatively connected to the central processing unit and to the channels, for transmitting the region identification information to identify one of the continuous regions to one of the channels; first means, operatively connected to said transmission means and located in said one of the channels, for storing said region identification information; second means, operatively connected to said at least one register, the channels, and to said main storage area, for adding the heading address of the continuous region identified by the region identification information stored in said first means to the main storage address provided by said one of the channels, so that a system absolute address is obtained; and third means, operatively connected to said second means, said at least one register and to said central processing unit, for comparing said system absolute address with the trailing address of the continuous region identified by the region identification information, said third means transmitting an address exception signal to said central processing unit if the result of the comparison indicates that said system absolute address corresponds to a portion of the main storage area outside the continuous region identified by the region identification information, said main storage area being accessed in dependence upon said system absolute address, said transmission means comprising: fourth means, operatively connected to the main storage area, for decoding one of the data transfer instructions for one of the channels; fifth means, operatively connected to said fourth means, for storing the region identification information for said one of the channels; and sixth means, operatively connected to said fifth means, for transmitting the region identification information to said one of the channels when the data transfer instruction is decoded, whereby the overhead for memory mapping is reduced.