초록 ▼

First of all, this invention relates to a process based on the comparison of the image of a reference object Iref with the image of an object to be inspected Iexa. Images Iref and Iexa are picked-up, sampled, discretized and thresheld to produce electronic or binary images IREF and IEXA, respectivel

First of all, this invention relates to a process based on the comparison of the image of a reference object Iref with the image of an object to be inspected Iexa. Images Iref and Iexa are picked-up, sampled, discretized and thresheld to produce electronic or binary images IREF and IEXA, respectively. These images are cleaned, then centered, IREF is adjusted to the minimum dimensional tolerances and becomes (IREF)min. For each image point (pixel), the adjustment is performed by using a structuring element of variable size, the size of which is controlled by a bus from the data contained in a memory unit which take the location of the pixel on the reference object, into account. (IREF)min is compared to IEXA which ensures the following function: [(IREF)minOR IEXA]EXCL. OR IEXA. The resulting image is the image of the “lack”type defects (which does not appear in Iexa with respect to Iref). Each defect is studied in a defect analysis unit which computes the dimensions of the defect and compares these dimensions with the maximum allowed size of the defect in this location. For this purpose, this circuit uses the reject criteria for this location, which are contained in a memory unit. The processing operations (adjustment and analysis) and the production of the corresponding data contained in the memory, are synchronized by count and delay circuits. The binary result (accepted/rejected) is available on a line. The defects of the “spreading”type are processed in the same way. The logic level of the line which is connected to a computer, determines the final decision (accepted/rejected). This invention also relates to an apparatus and circuits for carrying out the described process. This invention can be more particularly used in manufacturing semiconductors (masks, modules, chips, . . . ).

대표청구항 ▼

A process for inspecting objects showing patterns with dimensional tolerances and reject criteria varying in accordance with the location of said patterns, of the type including the comparision of image Iref of a reference object with image Iexa of an object to be inspected, the latter being liable

A process for inspecting objects showing patterns with dimensional tolerances and reject criteria varying in accordance with the location of said patterns, of the type including the comparision of image Iref of a reference object with image Iexa of an object to be inspected, the latter being liable to show geometrical defects with respect to the reference object, characterized in that in includes the following steps; Step 1－elaborating binary electronic images IREF and IEXA from images Iref and Iexa, Step 2－defining a structuring element B for each image point (pixel) the size of said structuring element being able to vary for each pixel in function of predetermined data and adjusting IREF to the maximum and minimum dimensional tolerances by expanding and eroding said image by structuring element B, which provides (IREF)max and (IREF)min, Step 3－forming images of the “spreading”and “lack”type defects by respectively carrying out the following logical operations: [(IREF)max OR IEXA]EXCL. OR (IREF)max and [(IREF)min OR IEXA]EXCL. OR IEXA′and Step 4－measuring the size of the defects on the defect images and comparing said defects with respect to reject criteria which define, for each pixel, the dimensions of the defects which can be accepted according to predetermined data.