초록 ▼

A lock-out security arrangement for and method of maintaining microprocessor-controlled electronic equipment normally operational until the occurrence of a disabling event, such as physical removal of the equipment from its normal installation, and/or electrical removal of the equipment from a sourc

A lock-out security arrangement for and method of maintaining microprocessor-controlled electronic equipment normally operational until the occurrence of a disabling event, such as physical removal of the equipment from its normal installation, and/or electrical removal of the equipment from a source of electrical power, and thereupon for disabling the equipment after detecting the disabling event and for maintaining the equipment disabled, even after the disabling event has been discontinued, until a code manually entered via a keyboard associated with a microprocessor for controlling the normal operation of the equipment matches a private access code whose identity is protected from external interrogation by reason of being stored in an internal non-volatile memory of the microprocessor. The private access code is preferably selected by and known only to the user, and may be changed to a different private access code at the user\s option.

대표청구항 ▼

A lock-out security arrangment for rendering electronic equipment having a normal operation inoperative after a disabling event has occurred, and for maintaining the equipment inoperative after the disabling event has terminated, comprising: (a) a microprocessor having an internal, non-volatile, pro

A lock-out security arrangment for rendering electronic equipment having a normal operation inoperative after a disabling event has occurred, and for maintaining the equipment inoperative after the disabling event has terminated, comprising: (a) a microprocessor having an internal, non-volatile, protected memory accessed solely by the microprocessor and protected from interrogation external to the microprocessor, said microprocessor being operative for executing a program stored in the internal memory, said program having an operational routine for controlling the normal operation of the equipment, and a security routine for controlling the security of the equipment; (b) said security routine having means for distinguishing between an initial execution of the security routine and a subsequent execution of the security routine; (c) means responsive to the initial execution of the security routine, for storing a first code in a secured manner in the internal memory of the microprocessor such that the stored first code is protected from interrogation external to the microprocessor; (d) code entry means operatively connected to the microprocessor, for entering a second code to the microprocessor; (e) said security routine having code validity means for comparing the second code entered using the code entry means to the stored first code whose identity is protected from external interrogation; (f) enabling means responsive to a completed initial execution, or to the subsequent execution, of the security routine, for enabling the microprocessor to execute the operational routine after the first code has been stored in the internal memory of the microprocessor, and for maintaining the equipment normally operational until the disabling event has occurred; (g) detector means operatively connected to the microprocessor, for detecting when the disabling event has occurred; and (h) disabling means responsive to the detector means and operatively connected to the microprocessor, for disabling the equipment from normal operation after the disabling event has occurred, said disabling means being further operative for maintaining the equipment disabled, even after the disabling even has terminated, until the second code matches the stored first code.