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Mechanically programmable read only memory 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G11C-017/00
출원번호 US-0505951 (1983-06-20)
발명자 / 주소
  • Ames Oliver C. (Rte. 2
  • Box 52A Clear Lake WI 54005)
인용정보 피인용 횟수 : 28  인용 특허 : 1

초록

A mechanically programmable read only memory in the form of a card for use with a reading circuit to which the card is applied, an insulating substrate with a multiplicity of resistive coating strips arranged in a pattern on the face of a substrate, a multiplicity of circuit interrupters between cor

대표청구항

A mechanically programmable read only memory for use with reading circuitry and comprising, an insulating substrate having a face and an edge portion, circuit interrupter means including a removable support area on the substrate, a plurality of resistors on the substrate adjacent the circuit interru

이 특허에 인용된 특허 (1)

  1. Thornburg David D. (Los Altos CA), Thin film programmable read-only memory having transposable input and output lines.

이 특허를 인용한 특허 (28)

  1. Marr, Kenneth W., Apparatus for determining burn-in reliability from wafer level burn-in.
  2. Marr,Kenneth W., Apparatus for determining burn-in reliability from wafer level burn-in.
  3. Eick,Chris D.; Shelby,Dugan; Harkey,John R., Enhanced accuracy fuel metering system and method.
  4. Irwin, Jr., Kenneth E.; Streeter, Gary R.; Behm, William F.; Tevis, Mark, Game apparatus.
  5. Marr,Kenneth W., Method and apparatus for determining burn-in reliability from wafer level burn-in.
  6. Brett Debenham ; Kim Pierce ; Douglas J. Cutter ; Kurt Beigel ; Fan Ho ; Patrick J. Mullarkey ; Dien Luong ; Hua Zheng ; Michael Shore ; Jeffrey P. Wright ; Adrian E. Ong ; Todd A. Merritt, Method and apparatus for storage of test results within an integrated circuit.
  7. Beffa, Raymond J., Method for sorting integrated circuit devices.
  8. Beffa, Raymond J., Method for sorting integrated circuit devices.
  9. Beffa,Raymond J., Method for sorting integrated circuit devices.
  10. Beffa,Raymond J., Method for sorting integrated circuit devices.
  11. Beffa,Raymond J., Method for sorting integrated circuit devices.
  12. Akram,Salman; Farnworth,Warren M.; Gochnour,Derek J.; Hembree,David R.; Hess,Michael E.; Jacobson,John O.; Wark,James M.; Wood,Alan G., Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs.
  13. Akram,Salman; Farnworth,Warren M.; Gochnour,Derek J.; Hembree,David R.; Hess,Michael E.; Jacobson,John O.; Wark,James M.; Wood,Alan G., Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICS will undergo, such as additional repairs.
  14. Akram, Salman; Farnworth, Warren M.; Gochnour, Derek J.; Hembree, David R.; Hess, Michael E.; Jacobson, John O.; Wark, James M.; Wood, Alan G., Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICs will undergo, such as additional repairs.
  15. Beffa,Raymond J., Method in an integrated circuit (IC) manufacturing process for identifying and redirecting IC's mis-processed during their manufacture.
  16. Beffa, Raymond J., Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture.
  17. Beffa, Raymond J., Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture.
  18. Marr, Kenneth W., Method, circuit and system for determining burn-in reliability from wafer level burn-in.
  19. Jones, Mark L.; Barnett, Gregory A., Methods for non lot-based integrated circuit manufacturing.
  20. Jones, Mark L.; Barnett, Gregory A., Methods for non-lot-based manufacturing of articles.
  21. Marr,Kenneth W., Methods for wafer level burn-in.
  22. Marr,Kenneth W., Methods for wafer level burn-in.
  23. Wilson,Kevin; Hjorth,Ron, Non-lot based method for assembling integrated circuit devices.
  24. Beffa,Raymond J., Sorting a group of integrated circuit devices for those devices requiring special testing.
  25. Beffa,Raymond J., Sorting a group of integrated circuit devices for those devices requiring special testing.
  26. Beffa,Raymond J., Sorting a group of integrated circuit devices for those devices requiring special testing.
  27. Zheng Hua ; Shore Michael ; Wright Jeffrey P. ; Merritt Todd A., Structure and a method for storing information in a semiconductor device.
  28. McBride,Jerry D., System for storing device test information on a semiconductor device using on-device logic for determination of test results.
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