초록 ▼

A photodetector output circuit comprises a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light falling thereon, a first shift register for receiving the signals from the first photodetectors in the pairs,

A photodetector output circuit comprises a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light falling thereon, a first shift register for receiving the signals from the first photodetectors in the pairs, a second shift register for receiving the signals from the second photodetectors in the pairs, and a pair of first and second sample and hold circuits for successively sampling and holding outputs from final stages of the first and second shift registers, respectively. A comparator receives as inputs outputs from the first and second sample and hold circuits for delivering out signals when the received inputs have a level difference of a predetermined value or higher. With this arrangement, the photodetector output circuit can produce digital signals indicative only of abrupt changes in the level of incident light and excludes any influence due to gradual light level variations which would result from shading.

대표청구항 ▼

A photodetector output circuit for an auto focussing camera comprising: a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light from an object to be photographed falling thereon; a first analog shift regist

A photodetector output circuit for an auto focussing camera comprising: a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light from an object to be photographed falling thereon; a first analog shift register for receiving the signals from said first photodetectors in said pairs; a second analog shift register for receiving the signals from said second photodetectors in said pairs; a pair of first and second sample and hold circuits for successively sampling and holding said analog outputs from final states of said first and second shift registers, respectively, and for successively resetting held samples after they have overlapped in time; and a comparator receptive as inputs of outputs from said first and second sample and hold circuits having gated output for delivering out digital logic signals representing when the received overlapped inputs have a level difference of a predetermined value or higher thereby providing comparator output which rejects gradual changes in incident light.