IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0414105
(1982-09-02)
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발명자
/ 주소 |
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출원인 / 주소 |
- LTV Aerospace and Defense Company
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대리인 / 주소 |
Cate, J. M.Sadacca, S. S.
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인용정보 |
피인용 횟수 :
9 인용 특허 :
0 |
초록
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A circuit for providing controlled switching of power applied to a load is adapted for actuating and deactivating a power switching circuit in response to a command signal. The circuit employs a switching circuit having a time delay section operable to terminate application of power immediately upon
A circuit for providing controlled switching of power applied to a load is adapted for actuating and deactivating a power switching circuit in response to a command signal. The circuit employs a switching circuit having a time delay section operable to terminate application of power immediately upon the cessation of a control signal and to conduct current after a predetermined delay interval after receipt of a command signal. The circuit is adapted for use with pyrotechnic ignition systems in which it is desired to quickly discharge capacitive elements connected to a load for prevention of undesired and possibly hazardous build-up of heat in a resistive ignition element.
대표청구항
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1. A circuit for selectively energizing an electrically actuatable load, comprising: a source of electrical power, a load, and a switching circuit connected in mutual series; signal generating means for generating command signals control means, coupled to the signal generating means and the swi
1. A circuit for selectively energizing an electrically actuatable load, comprising: a source of electrical power, a load, and a switching circuit connected in mutual series; signal generating means for generating command signals control means, coupled to the signal generating means and the switching circuit, for actuating the switching circuit upon reception from the signal generating means, of a command signal having a predetermined value over time, and for deactivating the switching circuit upon the termination of a command signal, the control means having internal power storage means for storing energy received from the signal generating means and for actuating the control means upon termination of a command signal from the signal generating means. 2. The circuit of claim 1, wherein the control means is connected in series between the signal generating means and the switching circuit and comprises means for actuating the switching circuit upon the reception of a command signal, integrated over time, exceeding a predetermined level. 3. The apparatus of claim 2, wherein the control means is connected in series between the signal generating means and the switching circuit, the internal storage means comprising a capacitor having one terminal connected to receive command signals, and means, connected in parallel with the capacitor, for preventing discharge of the capacitor during reception of a signal from the command signal source and for effecting discharge of the capacitor and deactivation of the switching circuit upon termination of the command signal. 4. The apparatus of claim 3, wherein the means for effecting discharge of the capacitor comprises a transistor having its emitter collector circuit connected in parallel with the capacitor, and a diode having its anode connected to the base of the transistor and its cathode connected to the emitter of the transistor. 5. A circuit for storing electrical charge in response to a command signal from a current source, and for rapidly dissipating electrical charge upon termination of the command signal, comprising: first, capacitive storage means for receiving and storing electrical energy from the command signal source; second means, connected in parallel with the first means, for preventing discharge of the capacitive storage means during reception of a signal from the command signal source and for effecting discharge of the capacitive storage means upon termination of the command signal, the first means comprising means for storing power for actuating the second means upon termination of the command signal. 6. The apparatus of claim 5, wherein the second means comprises a transistor, and a diode connected between the emitter and the base of the transistor. 7. A circuit for selectively energizing an electrically actuatable load, comprising: (a) first means, for receiving electrical signals from a signal source; (b) second means, for preventing any of said electrical signals, below a predetermined value over time, from energizing the electrically actuatable load, and for applying an actuating voltage to energize the load upon reception of electrical signals above the predetermined value over time, the second means comprising a capacitive element; and (c) third means, for automatically and rapidly dispersing undesirable, accumulated charge from the capacitive element upon termination of an electrical signal, the second means comprising means for storing energy received from the signal source and for applying said energy to the third means for actuating the third means upon termination of an electrical signal from the signal source. 8. A circuit in accordance with claim 7, comprising a fourth means for generating electrical signals and for applying the signals to the first means, 9. A circuit for selectively energizing a load, comprising (a) first means, for receiving electrical signals from a signal source; (b) second means, for preventing electrical signals, below a predetermined value over time, from energizing the load, and for applying an actuating voltage to energize the load upon reception of electrical signals above the predetermined value over time, the second means comprising a capacitive element; (c) third means, for automatically and rapidly dispersing undesirable, accumulated charge from the capacitive element upon termination of an electrical signal; and (d) fourth means for generating electrical signals and for applying the signals to the first means, wherein at least two loads, within respective load circuits in mutually parallel connection, are provided, each load circuit comprising means associated with the pulse generating means. 10. A circuit in accordance with claim 9: (a) wherein said first means comprises a fifth means, for electrically isolating the load circuits, the fifth means having a current control switch for regulating current flow within at least one of the load circuits in relation to applied electrical signals; (b) further comprising power supply means for applying power to the load within at least one load circuit; and (c) sixth means, associated with the second means, for controlling current flow through the load associated with the power supply means in response to actuating voltage from the second means. 11. A circuit in accordance with claim 10, wherein said isolating means is an optical isolator which comprises: (a) a current limiting resistor; (b) a light emitting diode, connected in series with the current limiting resistor, which is actuatable by electrical signals from the signal source; and (c) a photosensitive switch, which is associated with and actuatable by the light emitting diode, having a first transistor, a second switching transistor being provided connected in a Darlington pair configuration to the base of the first transistor, 12. A circuit in accordance with claim 10, wherein said sixth means comprises: (a) a pair of transistors connected in a Darlington pair configuration, each transistor having a biasing resistor connected across its emitter-to-base junction; and (b) a reverse-biased diode connected in parallel with the Darlington pair transistors across the collector-to-emitter junctions of the transistors. 13. A circuit for selectively energizing at least two loads in parallel configuration, comprising: (a) first means, for receiving electical signals from a signal source; (b) second means, for preventing any of said electrical signals, below a predetermined value over time, from energizing the electrically actuatable loads, and for applying an actuating voltage to energize the loads upon reception of electrical signals above the predetermined value over time, the second means comprising a capacitive element; and (c) third means, for automatically and rapidly dispersing undesirable, accumulated charge from the capacitive element upon termination of an electrical signal, wherein the second and third means are interconnected and comprise: (d) a resistor and a capacitor connected to provide an R-C time delay, having component values designed to accumulate an electrical charge in the capacitor over a specific length of time, thereby preventing those electrical pulses having less than a minimum amplitude integrated over time from effecting an electrical charge above a preselected value; (e) a normally nonconducting transistor, connected with its emitter-to-collector circuit in parallel with the capacitor, which, when in a conductive state, acts to rapidly discharge said capacitor; (f) a diode connected across the emitter-and-base terminals of the transistor, comprising means creating a voltage differential biasing the transistor and maintaining the transistor in a normally non-conducting state when voltage passes through the diode, but blocking any reversed flow of current, preventing any substantial drop in potential at the emitter of the transistor; (g) a biasing resistor connected across the base-to-collector junction of the transistor and comprising means for permitting an accumulation of electric charge at the base of the transistor when current is caused to flow through the transistor's emitter-to-base junction and for causing the emitter-to-collector path to become conductive, thereby providing a discharge path to ground for the accumulated charge in the capacitor, further comprising a means for generating an electrical pulse of variable duration and magnitude; (h) wherein said first means comprises means for electrically isolating each parallel load circuit, said means having a current control switch to regulate current flow within at least one of the load circuits in response to the applied electrical pulses, (i) further comprising means for applying power, to each parallel load circuit, of sufficient magnitude to actuate the respective associated load; and (j) means for controlling current flow through the respective associated loads in relation to the voltage transferred through the second, preventative means. 14. A circuit in accordance with claim 13, wherein said isolating means is an optical isolator which comprises: (a) a current limiting resistor; (b) a light emitting diode, connected in series with the limiting resistor, which is actuatable by the applied electrical pulses; and (c) a photosensitive switch which is actuatable by the light emitting diode and connected in a Darlington pair configuration to the base of a p-n-p transistor, through which the current flow of the isolated parallel load circuit is regulated. 15. A circuit in accordance with claim 14, wherein said load current control means comprises: (a) a pair of p-n-p transistors connected in a Darlington pair configuration, each transistor having a biasing resistor connected across its emitter-to-base circuit; and (b) a reverse-biased diode connected in parallel to the Darlington pair transistors across the collector-to-emitter circuit of the transistors.
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