Leadless chip carrier apparatus providing for a transmission line environment and improved heat dissipation
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-023/14
H01L-023/40
H01L-023/48
H01L-023/04
출원번호
US-0432843
(1982-10-05)
발명자
/ 주소
Gilbert, Barry K.
Schwab, Daniel J.
출원인 / 주소
Mayo Foundation
대리인 / 주소
Merchant, Gould, Smith, Edell, Welter & Schmidt
인용정보
피인용 횟수 :
103인용 특허 :
9
초록▼
A carrier apparatus (40) for mounting logic components on the surface of a circuit board (41). The carrier apparatus (40) includes a housing structure defining top and bottom surfaces and further defining a cavity (50) in the bottom surface for receipt of a logic component (51). A recessed cover por
A carrier apparatus (40) for mounting logic components on the surface of a circuit board (41). The carrier apparatus (40) includes a housing structure defining top and bottom surfaces and further defining a cavity (50) in the bottom surface for receipt of a logic component (51). A recessed cover portion (56) is attached to the housing so as to enclose the cavity (50) thereby effectively sealing the logic component (51) in the housing. The carrier apparatus (40) includes means for mounting the housing on a circuit board such that the cover (56) does not make contact with the surface of the circuit board (41). The housing further includes means for electrically interconnecting the logic component (51) to the circuit board (41). In yet another embodiment, a carrier apparatus (100) for mounting logic components on the surface of a circuit board (41) is disclosed which utilize ground and voltage planes together with alternating signal (118) and AC ground (121) traces so as to effectuate coplanar/strip-line and coplanar/microstrip transmission line environments along portions of the signal traces (118). Consequently, this results in signal lines having a controlled impedance environment and minimized parasitic shunt capacitance.
대표청구항▼
1. A carrier apparatus for mounting a logic component on a mounting surface of a circuit board, comprising: (a) a housing including multiple layers of dielectric material, said housing having a bottom surface and a top surface facing in an opposite direction and separated from said bottom surface
1. A carrier apparatus for mounting a logic component on a mounting surface of a circuit board, comprising: (a) a housing including multiple layers of dielectric material, said housing having a bottom surface and a top surface facing in an opposite direction and separated from said bottom surface by the multiple layers of dielectric material, said housing having a cavity disposed in said bottom surface for receipt of a logic component, said housing having no such cavity disposed in said top surface, said cavity extending part way into said housing and defining a surface recessed within said housing for attachment of the logic component; (b) a lid portion positioned over said cavity for hermetically sealing the logic component in said cavity; (c) means for mounting said housing on the mounting surface of the circuit board with said bottom surface of said housing and said lid portion facing the mounting surface such that said lid portion is spaced from the mounting surface of the circuit board, said top surface facing away from the circuit board; (d) heat dissipation means positioned proximate said top surface for dissipating heat away from the surface of the circuit board, the thickness of said top surface of said housing being minimized to facilitate heat dissiptation and yet provide structural integrity to said housing; and (e) said housing including means for electrically interconnecting the logic component to the circuit board, said electrical interconnecting means including horizontally extending electrical leads embedded within said housing and vertically extending electrical leads electrically interconnecting said horizontally extending electrical leads to the circuit board, said horizontally extending electrical leads including horizontally spaced apart alternating ground and signal electrical leads embedded in said dielectric material of said housing between vertically spaced apart planes selected from voltage and ground planes extending parallel to said ground and signal electrical leads so as to provide a transmission line environment along said signal electrical leads, certain of said horizontally extending electrical leads being interconnected to the logic component. 2. A carrier apparatus in accordance with claim 1, wherein said vertically extending electrical leads include vertically extending indentations proximate the periphery of said housing, said indentations being electrically conductive, said indentations being further electrically interconnected with circuit board. 3. A carrier apparatus in accordance with claim 1, wherein said lid portion is grounded to electromagnetically shield the logic component in said cavity from extraneous electrical signals and to prevent signal leakage from said cavity. 4. A carrier apparatus in accordance with claim 1, wherein said heat dissipation means is integral with said housing. 5. A carrier apparatus in accordance with claim 1, wherein said heat dissipation means is attached to said top surface of said housing facing away from the circuit board. 6. A carrier apparatus for mounting a logic component on the surface of a circuit board, comprising: (a) a housing having multiple layers of dielectric material and having first and second major surfaces facing in opposite directions, said first and second major surfaces being vertically separated from one another by the multiple layers of dielectric material, said housing having a cavity adapted for receipt of the logic component and extending from said second surface part way into the housing, said cavity defining a surface recessed within said housing for attachment of the logic component; (b) a lid portion positioned over said cavity for hermetically sealing the logic component in said cavity; (c) a plurality of horizontally extending electrical leads embedded within said housing, said electrical leads being arranged in a predetermined spatial planar configuration, said electrical leads including alternating signal and ground leads spaced apart by a dielectric material, a first portion of said electrical leads being partially enclosed by said lid portion and a second portion extending outwardly from said lid portion, said signal leads having a generally uniform width along said first and second portions, the width of said signal leads being greater along said first portion; (d) a plurality of horizontally extending, vertically spaced apart planes selected from voltage and ground planes embedded in said housing, said electrical leads being disposed between said planes, said planes being positioned substantially parallel to said electrical leads, said planes and said alternating signal and ground leads cooperating to necessarily provide a transmission line environment along said signal leads, a coplanar/stripline transmission line environment being present along said second portion of said signal leads not enclosed by said lid portion; (e) said housing including termination means for selectively terminating certain of said signal leads with their characteristic impedance, said termination means including vertically extending VIA means embedded in said housing and surface metalization means disposed on one of said major surfaces facing away from the circuit board, said termination means being necessarily positioned in close electrical proximity to the logic component and necessarily accessible after the logic component has been sealed in said housing to enable selective termination of said signal leads with their characteristic impedance as required; (f) voltage distribution means embedded in said housing for distributing voltage; (g) ground distribution means embedded in said housing for distributing ground; (h) means for electrically interconnecting said electrical leads to the circuit board; and (i) means for mounting said housing on the circuit board. 7. A carrier apparatus in accordance with claim 6, further including decoupling capacitance means electrically interconnected with said ground distribution means and said voltage distribution means for storing charge, whereby said decoupling capacitance means assists in minimizing voltage surges due to sudden current demands by the logic component, said decoupling capacitor means being accessible after the logic component has been sealed in said housing to enable selective decoupling. 8. A carrier apparatus in accordance with claim 6, wherein said lid portion is electrically conducting and is grounded to prevent electrical signal leakage from the logic component in said cavity to the outside of the said cavity and to prevent electrical signals from outside said cavity from interfering with the logic component in said cavity, a mixed dielectric coplanar/stripline transmission line environment being present along said first portion of said signal leads enclosed by said lid portion. 9. A carrier apparatus in accordance with claim 6, wherein said lid portion is dielectric, a coplanar/microstrip transmission line environment being present along said first portion of said signal leads enclosed by said lid portion. 10. A carrier apparatus in accordance with claim 6, wherein said lid portion is at least partially recessed in said housing and cooperates with said mounting means to enable inverse mounting of said housing on the circuit board with said lid portion facing the circuit board. 11. A carrier apparatus in accordance with claim 6, wherein said means for electrically interconnecting said electical leads to the circuit board includes vertically extending and electrically conducting indentations in the periphery of said housing, said indentations being interconnected to said electrical leads and to the circuit board. 12. A carrier apparatus in accordance with claim 6, wherein said means for electrically interconnecting said electrical leads to the circuit board includes VIA means extending vertically from proximate the circuit board to said electrical leads. 13. A carrier apparatus in accordance with claim 6, wherein said housing includes VIA means extending between layers for providing distribution of voltage and ground potentials between said housing layers. 14. A carrier apparatus for mounting a logic component on a mounting surface of a circuit board, comprising: (a) a housing including dielectric material, said housing having vertically spaced apart bottom and top surfaces facing in opposite directions from one another, a cavity being disposed in one of said bottom and top surfaces for receipt of a logic component, said cavity defining a surface recessed within said housing for attachment of the logic component; (b) a lid portion positioned over said cavity for enclosing the logic component in said cavity; (c) said housing including means for electrically interconnecting the logic component to the circuit board, said electrically interconnecting means including horizontally extending electrical leads embedded within said housing and vertically extending electrical leads electrically interconnecting said horizontally extending electrical leads to the circuit board, said horizontally extending electrical leads being horizontally spaced apart and separated by said dielectric material; (d) a plurality of horizontally extending, vertically spaced apart planes selected from voltage and ground planes embedded in said housing, said horizontally extending electrical leads being disposed between said planes, said planes being positioned substantially parallel to said horizontally extending electrical leads, said planes and said horizontally extending electrical leads cooperating to provide a transmission line environment along said horizontally extending electrical leads; and (e) means for mounting said housing on the circuit board. 15. A carrier apparatus in accordance with claim 14, further including heat dissipation means positioned proximate one of said top and bottom surfaces for directing heat away from the housing. 16. A carrier apparatus in accordance with claim 14, wherein said horizontally extending electrical leads include spaced apart alternating ground and signal leads. 17. A carrier apparatus in accordance with claim 14, wherein said cavity is disposed in said bottom surface facing the printed circuit board. 18. A carrier apparatus in accordance with claim 16, wherein a first portion of said signal leads are covered by said lid portion and a second portion of said signal leads extends horizontally beyond said lid portion, said signal leads having a substantially uniform width along said first and second portions, the width of said signal leads being greater along said first portion covered by said lid portion than along said second portion. 19. A carrier apparatus in accordance with claim 14, further including termination means for selectively terminating certain of said horizontally extending electrical leads with their characteristic impedance, said termination means including vertically extending VIA means embedded in said housing and extending to proximate one of said top and bottom surfaces so as to be accessible after the logic component is enclosed in said cavity of said housing, said termination means further including ground means positioned on one of said top and bottom surfaces for cooperating with said VIA means to enable selective termination of said horizontally extending electrical leads with their characteristic impedance after said cavity has been enclosed by said lid portion. 20. A carrier apparatus in accordance with claim 14, wherein said lid portion is grounded to electromagnetically shield the logic component in said cavity from extraneous electrical signals.
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