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UV erasable EPROM with UV transparent silicon oxynitride coating 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G11C-011/40
  • H01L-027/10
  • H01L-027/14
  • H01L-021/94
출원번호 US-0578992 (1984-02-13)
우선권정보 JP-0118278 (1979-09-14)
발명자 / 주소
  • Takasaki Kanetake (Tokyo JPX) Takagi Mikio (Kawasaki JPX) Koyama Kenji (Yokosuka JPX)
출원인 / 주소
  • Fujitsu Limited (Kawasaki JPX 03)
인용정보 피인용 횟수 : 25  인용 특허 : 4

초록

A silicon nitride film containing from 20 to 70% oxygen, for use as a surface passivation film, has enhanced ultraviolet ray transmissivity while exhibiting the desirable moisture proofness quality of a silicon nitride film.

대표청구항

A semiconductor device comprising: a semiconductor substrate; at least one element selected from the class consisting of active and passive elements formed on or in said semiconductor substrate; a first insulating film formed on said semiconductor substrate; electrodes of said at least one element d

이 특허에 인용된 특허 (4)

  1. Lewis ; William Newman, Combination glass/low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating overcoat with improved crack a.
  2. Custode Frank Z. (Norco CA), Fabrication of very large scale integrated circuits containing N-channel silicon gate nonvolatile memory elements.
  3. Schwabe Ulrich (Vaterstetten DEX) Jacobs Erwin (Munich DEX), Process for producing an integrated multi-layer insulator memory cell.
  4. Hezel Rudolf (Ringstr. 23 8521 Spardorf DEX), Solar cells composed of semiconductive materials.

이 특허를 인용한 특허 (25)

  1. He,Xinping; Wu,Chih huei; Zhao,Tiemin, Active pixel having reduced dark current in a CMOS image sensor.
  2. Ohmi,Tadahiro; Sugawa,Shigetoshi; Hirayama,Masaki; Shirai,Yasuyuki, Dielectric film and method of forming it, semiconductor device, non-volatile semiconductor memory device, and production method for semiconductor device.
  3. Paterson James L. (Richardson TX) Haken Boger A. (Richardson TX), Floating gate memory process with improved dielectric.
  4. Paterson James L. ; Armstrong Gregory James, High density EPROM cell and process for fabricating same.
  5. Jin Been Yih,TWX ; Yen Daniel L. W.,TWX ; Hwang Wen Yen,TWX ; Wang Ming Hong,TWX ; Wong Sheng Hsien,TWX ; Hwang Gino,TWX ; Chang Po Shen,TWX ; Liu Yu Tsai,TWX ; Chang Chung Chi,TWX ; Yang Ta Hung,TWX, Integrated circuit passivation process and structure.
  6. Yau Leopoldo D. (Durham OR) Gasser ; Jr. Robert A. (Cornelius OR) Week ; Jr. Kenneth R. (Sherwood OR) Yu Jick M. (Beaverton OR) Chin David D. (Aloha OR), MOS rear end processing.
  7. Cho, Byung-Jin, Method for forming an oxynitride film in a semiconductor device.
  8. Morita Shigeru (Tokyo JPX), Method for manufacturing a semiconductor device having a lens section.
  9. Hashimoto, Tatsuya; Maenosono, Toshiyuki; Togawa, Taiji; Enda, Takayuki; Takagi, Hideo, Method of fabricating semiconductor memory device and semiconductor memory device driver.
  10. Hashimoto, Tatsuya; Maenosono, Toshiyuki; Togawa, Taji; Enda, Takayuki; Takagi, Hideo, Method of fabricating semiconductor memory device and semiconductor memory device driver.
  11. Ohmi, Tadahiro; Sugawa, Shigetoshi; Hirayama, Masaki; Shirai, Yasuyuki, Method of forming a dielectic film that contains silicon, oxygen and nitrogen and method of fabricating a semiconductor device that uses such a dielectric film.
  12. Choi Jeong Yeol, Method of improving the reliability of low-voltage programmable antifuse.
  13. Ghneim Said N. ; Fulford ; Jr. H. Jim, Method of making non-volatile memory device having a floating gate with enhanced charge retention.
  14. Manos ; II Peter N. (Austin TX) Countryman ; Jr. Roger S. (Austin TX), Mosture barrier for floating gate transistors.
  15. Ghneim Said N. ; Fulford ; Jr. H. Jim, Non-volatile memory device having a floating gate with enhanced charge retention.
  16. Tanaka Sumio (Tokyo JPX) Sato Masaki (Kawasaki JPX) Saito Shinji (Yokohama JPX) Atsumi Shigeru (Tokyo JPX) Ohtsuka Nobuaki (Yokohama JPX), Nonvolatile semiconductor memory.
  17. Eitan, Boaz, Opaque cover for preventing erasure of an EPROM.
  18. Weimer,Ronald A., Process of forming an electrically erasable programmable read only memory with an oxide layer exposed to hydrogen and nitrogen.
  19. Yamazaki Kouji (Tokyo JPX) Gomi Hideki (Tokyo JPX), Semiconductor device having silicon oxynitride film with improved moisture resistance.
  20. Hosaka Takashi (Tokyo JPX), Semiconductor device with silicon oxynitride over refractory metal gate electrode in LDD structure.
  21. Harada, Kouichi; Ueda, Yasuhiro; Umezu, Nobuhiko; Wada, Kazushi; Toumiya, Yoshinori; Matsuda, Takeshi, Solid-state imaging device and method of fabricating the same.
  22. Harada, Kouichi; Ueda, Yasuhiro; Umezu, Nobuhiko; Wada, Kazushi; Toumiya, Yoshinori; Matsuda, Takeshi, Solid-state imaging device and method of fabricating the same.
  23. Wu, Chih-huei; Zhao, Tiemin; He, Xinping, Surface passivation to reduce dark current in a CMOS image sensor.
  24. Sing-Pin Tay ; Yao Zhi Hu ; Sagy Levy ; Jeffrey Gelpey, UV pretreatment process for ultra-thin oxynitride formation.
  25. Tay, Sing-Pin; Hu, Yao Zhi, UV-enhanced oxy-nitridation of semiconductor substrates.
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