$\require{mediawiki-texvc}$
  • 검색어에 아래의 연산자를 사용하시면 더 정확한 검색결과를 얻을 수 있습니다.
  • 검색연산자
검색연산자 기능 검색시 예
() 우선순위가 가장 높은 연산자 예1) (나노 (기계 | machine))
공백 두 개의 검색어(식)을 모두 포함하고 있는 문서 검색 예1) (나노 기계)
예2) 나노 장영실
| 두 개의 검색어(식) 중 하나 이상 포함하고 있는 문서 검색 예1) (줄기세포 | 면역)
예2) 줄기세포 | 장영실
! NOT 이후에 있는 검색어가 포함된 문서는 제외 예1) (황금 !백금)
예2) !image
* 검색어의 *란에 0개 이상의 임의의 문자가 포함된 문서 검색 예) semi*
"" 따옴표 내의 구문과 완전히 일치하는 문서만 검색 예) "Transform and Quantization"

특허 상세정보

Multilayer printed circuit board structure

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H05K-001/03   
미국특허분류(USC) 174/685 ; 361/387 ; 361/414 ; 427/96
출원번호 US-0564952 (1983-12-22)
발명자 / 주소
출원인 / 주소
인용정보 피인용 횟수 : 63  인용 특허 : 9
초록

A composite printed circuit board structure including multiple layers of graphite interleaved with layers of a dielectric material, such as a polytetrafluoroethylene (PTFE) and woven glass laminate. Some of the dielectric layers are copper clad, and at least some of the graphite layers are positioned in close proximity to the copper cladding layers, to provide good heat dissipation properties. The PTFE provides a desirably low dielectric constant and the graphite also provides good mechanical strength and a low or negative coefficient of thermal expansio...

대표
청구항

A multilayer printed circuit board having a desired coefficient of thermal expansion, good thermal conductivity and low dielectric constant, said circuit board comprising: a plurality of layers of conductive metal used to establish connections between components to be mounted on the board; a plurality of layers of graphite, at least some of which are positioned in close proximity to some of said layers of conductive metal, to provide a relatively low resistance path for the flow of heat from said layers of conductive metal; and a plurality of layers of a...

이 특허를 인용한 특허 피인용횟수: 63

  1. Humphries, Mark Robson; Ferdinandi, Frank; Smith, Rodney Edward. Apparatus with a multi-layer coating and method of forming the same. USP2015069055700.
  2. Nikkhoo, Michael. Bonded multi-layer graphite heat pipe. USP2017109791704.
  3. Vasoya, Kalu K.. Build-up printed wiring board substrate having a core layer that is part of a circuit. USP2016089408314.
  4. Vasoya, Kalu K.. Build-up printed wiring board substrate having a core layer that is part of a circuit. USP2012068203080.
  5. Nikkhoo, Michael; Hurbi, Erin. Carbon nanoparticle infused optical mount. USP20181010108017.
  6. Yokouchi, Kishio; Yoshimura, Hideaki; Fukase, Katsuya. Circuit board and method of manufacturing the same. USP2012048161636.
  7. Budnaitis John J. ; Fischer Paul J. ; Hanson David A. ; Noddin David B. ; Sylvester Mark F. ; Petefish William George. Constraining ring for use in electronic packaging. USP2000016011697.
  8. Budnaitis John J. ; Fischer Paul J. ; Hanson David A. ; Noddin David B. ; Sylvester Mark F. ; Petefish William George. Constraining ring for use in electronic packaging. USP1999035879786.
  9. Budnaitis John J. ; Fischer Paul J. ; Hanson David A. ; Noddin David B. ; Sylvester Mark F. ; Petefish William George. Constraining ring for use in electronic packaging. USP2001026184589.
  10. Middelman Erik (Arnhem NLX). Continuous process for the manufacture of substrates for printed wire boards. USP1993125269863.
  11. Knowles, Timothy R.; Seaman, Christopher L.. Dendritic fiber material. USP2005076913075.
  12. Knowles,Timothy R.; Seaman,Christopher L.. Dendritic fiber material. USP2006127144624.
  13. Bower, Christopher; Meitl, Matthew; Cok, Ronald S.. Display tile structure and tiled display. USP20190110181507.
  14. Bower, Christopher; Meitl, Matthew; Cok, Ronald S.. Display tile structure and tiled display. USP2017089741785.
  15. Bower, Christopher; Meitl, Matthew. Efficiently micro-transfer printing micro-scale devices onto large-format substrates. USP20190210217730.
  16. Brooks, Andrew Simon Hall; Von Werne, Timothy Allan. Electrical assembly and method. USP2015038995146.
  17. Knowles,Timothy R.; Seaman,Christopher L.. Fiber adhesive material. USP2006117132161.
  18. McBride Donald G. (Binghamton NY) Ellis Theron L. (Vestal NY). Flexible carrier for an electronic device. USP1990064937707.
  19. McBride Donald G. (Binghamton NY) Ellis Theron L. (Vestal NY). Flexible carrier for an electronic device. USP1991014987100.
  20. Schneider, Douglas; Davis, William E.. Graphene-based thermal management cores and systems and methods for constructing printed wiring boards. USP2016059332632.
  21. Hoffarth Joseph G. (Binghamton NY) Wiley John P. (Vestal NY). High performance circuit boards. USP1989094868350.
  22. Leibowitz Joseph D. (Culver City CA). High-frequency multilayer printed circuit board. USP1989034812792.
  23. Yamada Minoru (Iruma JPX) Wajima Motoyo (Hitachi JPX) Masaki Akira (Musashino JPX) Takahashi Akio (Hitachiota JPX) Nakanishi Keiichirou (Kokubunji JPX) Sugawara Katuo (Hitachi JPX). Hybrid multilayer wiring board. USP1987124710854.
  24. Devera Michael J. (Cedar Rapids IA) Williams Rick A. (Iowa City IA) Mulka Jerome P. (Marion IA). Installation of surface mount components on printed wiring boards. USP1990074937934.
  25. Sylvester Mark F.. Integrated circuit chip package assembly. USP1999055900312.
  26. Vasoya, Kalu K.; Mangrolia, Bharat M.; Davis, William E.; Bohner, Richard A.. Lightweight circuit board with conductive constraining cores. USP2010027667142.
  27. Vasoya, Kalu K.; Mangrolia, Bharat M.; Davis, William E.; Bohner, Richard A.. Lightweight circuit board with conductive constraining cores. USP2009127635815.
  28. Vasoya, Kalu K.; Mangrolia, Bharat M.; Davis, William E.; Bohner, Richard A.. Lightweight circuit board with conductive constraining cores. USP2005036869664.
  29. Lazzarini Donald J. (Binghamton NY) Wiley John P. (Vestal NY) Wiley Robert T. (Binghamton NY). Low dielectric printed circuit boards. USP1989094864722.
  30. LeVasseur Robert D. (Binghamton NY) McKeown Stephen A. (Endicott NY). Low thermal expansion, heat sinking substrate for electronic surface mount applications. USP1990104963414.
  31. Rossi Markku J. (Houston TX). Low weight multilayer printed circuit board. USP1997045619018.
  32. Nikkhoo, Michael; Hurbi, Erin. Metal encased graphite layer heat pipe. USP20180710028418.
  33. Abe, Tomoyuki; Hayashi, Nobuyuki; Tani, Motoaki. Method for manufacturing multilayer wiring board incorporating carbon fibers and glass fibers. USP2010017640660.
  34. Ferdinandi, Frank; Smith, Rodney Edward; Humphries, Mark Robson. Method for manufacturing printed circuit boards. USP2017059648720.
  35. Leibowitz Joseph D. (Culver City CA). Method of making multilayer printed circuit board. USP1989104875282.
  36. Kobayashi, Takashi; Oka, Seiji; Funahashi, Kazuo; Tsuruse, Hideki. Method of manufacturing a circuit print board. USP2003106629362.
  37. Ozaki Risuke (Kokubunji JPX). Method of manufacturing printed circuit boards. USP1989114882000.
  38. Bower, Christopher. Methods for surface attachment of flipped active components. USP20180610008465.
  39. Bower, Christopher. Methods for surface attachment of flipped active components. USP20190410262966.
  40. Marino,Filippo; Capici,Salvatore. Methods of manufacturing and testing bonding wires. USP2007097263759.
  41. Bower, Christopher; Meitl, Matthew; Trindade, António José Marques; Cok, Ronald S.; Raymond, Brook; Prevatte, Carl. Micro-transfer-printable flip-chip structures and methods. USP20190310224231.
  42. Watanabe, Yousuke. Mobile terminal device and method for radiating heat therefrom. USP2009117616446.
  43. Watanabe,Yousuke. Mobile terminal device and method for radiating heat therefrom. USP2008027330354.
  44. Wiley John P. (Vestal NY). Modularized fabrication of high performance printed circuit boards. USP1989084854038.
  45. Leibowitz Joseph D. (Culver City CA). Multilayer printed circuit board for ceramic chip carriers. USP1989034814945.
  46. Tani,Motoaki; Hayashi,Nobuyuki; Abe,Tomoyuki; Takahashi,Yasuhito; Shuto,Takashi. Multilayer wiring board. USP2006027002080.
  47. Abe,Tomoyuki; Hayashi,Nobuyuki; Tani,Motoaki. Multilayer wiring board incorporating carbon fibers and glass fibers. USP2007057224046.
  48. Ogatsu, Toshinobu. Multilayer-wired substrate. USP2013028377543.
  49. Doneker, Robert L.; Thompson, Kent G. R.. Noise dampening energy efficient circuit board and method for constructing and using same. USP2013108569631.
  50. Kim, You Bean; Kang, Seock-Hwan; Lee, Jong Seo. Printed circuit board, display device and method of manufacturing printed circuit board. USP2016039288900.
  51. Ferdinandi, Frank; Smith, Rodney Edward; Humphries, Mark Robson. Printed circuit boards. USP2013078492898.
  52. Abe,Tomoyuki; Hayashi,Nobuyuki; Tani,Motoaki; Abe,Kenichiro; Iida,Kenji. Printed wiring board. USP2008067388157.
  53. Vasoya,Kalu K.. Printed wiring boards possessing regions with different coefficients of thermal expansion. USP2007117301105.
  54. Vasoya, Kalu K.. Processes for manufacturing printed wiring boards. USP201507RE45637.
  55. Bower, Christopher; Meitl, Matthew; Cok, Ronald S.. Redistribution layer for substrate contacts. USP2018029899465.
  56. Suzuki Hirosuke (Saitama JPX). Reinforced dielectric sheet. USP1989084857381.
  57. Sylvester Mark F.. Substrate with die area having same CTE as IC. USP2001066248959.
  58. Gandi, Angelo; De Oliveira, Rui; Carter, Anthony Arthur. Thermal management device and method of making such a device. USP2004026689471.
  59. Gandi, Angelo; De Oliveira, Rui; Carter, Anthony Arthur. Thermal management device and method of making such a device. USP2003026514616.
  60. Herzl Alfred. Thermally conductive support structure. USP2000086102112.
  61. Wilson James Warren ; Engle Stephen Robert ; Moore Scott Preston. Thermally enhanced ball grid array package. USP1998065768774.
  62. Leach, Benjamin James. Thermosetting polymer formulations, circuit materials, and methods of use thereof. USP20181110123412.
  63. Tani, Motoaki; Hayashi, Nobuyuki; Abe, Tomoyuki; Takahashi, Yasuhito; Saeki, Yoshiyasu. Wiring board with core layer containing inorganic filler. USP2005036869665.