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Semiconductor package with contact springs 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
  • H01L-023/50
  • H05K-007/12
  • H01R-013/02
출원번호 US-0885339 (1986-07-11)
우선권정보 FR-0001406 (1981-01-26)
발명자 / 주소
  • Keryhuel Alain (Pavilly FRX) Meigne Christian (Barentin FRX)
출원인 / 주소
  • Burroughs Corporation (Detroit MI 02)
인용정보 피인용 횟수 : 28  인용 특허 : 11

초록

An integrated circuit package for high density applications comprises spring contacts on one face thereof for its removable mounting onto a printed circuit board, the mounting being accomplished by means of a frame assembly and the package being automatically fabricable in a continuous flow process

대표청구항

An integrated circuit packaging system, including an integrated circuit package which comprises; a planar carrier comprising first and second surfaces, said first surface being adapted for having an integrated circuit affixed thereto, a lid for enclosing said integrated circuit against said first su

이 특허에 인용된 특허 (11)

  1. Dathe Joachim (Munich DEX) Schmidhuber Erich (Regensburg DEX), Case for a semiconductor component.
  2. Andrews Daniel M. (San Marcos CA) Merlina Joseph F. (Harrisburg PA) Redmond John P. (Mechanicsburg PA) Scheingold William S. (Palmyra PA) Ulbrich George (Harrisburg PA), Chip carrier.
  3. Ugon Michel (Plaisir FRX), Flat package for integrated circuit devices.
  4. Tourneux Michel (Velizy FRX), Generator panel having solar cells incorporated in a laminated assembly.
  5. Pilz Dieter (Zugspitzstrasse 6 D-8039 Puchheim DEX), Housing for electrical components, component groups or integrated circuit.
  6. Slagel Gary A. (Richardson TX) Bonfield Peter L. (Dallas TX), Interchangeable module for integrated circuits.
  7. Grabbe Dimitry (Lisbon Falls ME) Patterson Ronald (Dauphin PA), Lead frame and chip carrier housing.
  8. Cutchaw John M. (7333 E. Virginia Scottsdale AZ 85257), Liquid cooled connector for large scale integrated circuit packages.
  9. Grabbe ; Dimitry G., Method for packaging hermetically sealed integrated circuit chips on lead frames.
  10. Yasuda Tetuya (Tokyo JA) Iinuma Yoshio (Higashimurayama JA) Maekawa Yuzo (Fuchu JA), Mounting arrangement for an integrated circuit unit in an electronic digital watch.
  11. Oliver David W. (Schenectady NY) Lavoo Norman T. (Schenectady NY), Tube with bonded cathode and electrode structure and getter.

이 특허를 인용한 특허 (28)

  1. Bolken,Todd O.; Cobbley,Chad A., Ball grid array packages with thermally conductive containers.
  2. Owen, Peter; Zeglin, Conrad; Roman, Barclay; Meister, Mark, Carrier for mounting a piezoelectric device on a circuit board and method for mounting a piezoelectric device on a circuit board.
  3. Bolken,Todd O.; Baerlocher,Cary J.; Corisis,David J.; Cobbley,Chad A., Circuit and substrate encapsulation methods.
  4. Sano Toshifumi (Tokyo JPX), Cooling structure.
  5. Mine Shinji (Tokyo JPX) Shimonishi Terumi (Tokyo JPX), Cooling structure for heat generating electronic components mounted on a substrate.
  6. Umezawa, Kazuhiko, Cooling system for IC package.
  7. Mine Shinji (Tokyo JPX), Cooling system for three-dimensional IC package.
  8. Umezawa Kazuhiko (Tokyo JPX), Cooling unit.
  9. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L., Fabricating interconnects and tips using sacrificial substrates.
  10. Umezawa Kazuhiko (Tokyo JPX) Komatsu Toshiaki (Tokyo JPX) Kubokawa Jun (Yamanashi JPX), Flat cooling structure of integrated circuit.
  11. Selna Erich H., Hold-down collar for attachment of IC substrates and elastomeric material to PCBS.
  12. Huang, Chien Ping, Integrated circuit package configuration having an encapsulating body with a flanged portion and an encapsulating mold for molding the encapsulating body.
  13. Khandros Igor Y. ; Mathieu Gaetan L., Interconnection substrates with resilient contact structures on both sides.
  14. Yamaguchi, Tadashi, Method for production of a semiconductor device with package that includes an insulator frame on a metal member.
  15. Glascock ; II Homer H. (Scotia NY), Method of bonding a silicon package for a power semiconductor device.
  16. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
  17. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
  18. Bolken, Todd O.; Baerlocher, Cary J.; Corisis, David J.; Cobbley, Chad A., Packages for semiconductor die.
  19. Bolken,Todd O.; Baerlocher,Cary J.; Corisis,David J.; Cobbley,Chad A., Packages for semiconductor die.
  20. Bolken,Todd O.; Baerlocher,Cary J.; Corisis,David J.; Cobbley,Chad A., Packages for semiconductor die.
  21. Shiffer,Stephen R.; Abramowski,Jerry; Figi,Bruce B., Plastic lead frames utilizing reel-to-reel processing.
  22. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
  23. David J. Corisis ; Todd O. Bolken, Semiconductor card and method of fabrication.
  24. Yamaguchi, Tadashi, Semiconductor device and method for production thereof.
  25. Yamaguchi Tadashi,JPX, Semiconductor package that includes a shallow metal basin surrounded by an insulator frame.
  26. Dozier ; II Thomas H. ; Khandros Igor Y., Solder preforms.
  27. Umezawa Kazuhiko (Tokyo JPX), Structure for temperature detection in a package.
  28. Ettehadieh Ehsan ; Kaul Sunil ; Malladi Dev, Thermal management enhancements for cavity packages.
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