Decoding device for code symbols protected by Reed-Solomon code
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-011/10
출원번호
US-0653255
(1984-09-24)
우선권정보
NL-0000630 (1984-02-29)
발명자
/ 주소
Baggen Constant P. M. J. (Eindhoven NLX) Driessen Leonardus M. H. E. (Eindhoven NLX) Pollen Rudy W. J. (Eindhoven NLX) Vries Lodewijk B. (Eindhoven NLX)
출원인 / 주소
U.S. Philips Corporation (New York NY 02)
인용정보
피인용 횟수 :
18인용 특허 :
5
초록▼
For the decoding of a data stream which is word-wise protected against errors by a double Reed-Solomon code with symbol-wise interleaving over the code words, first the reliability information for the constituent symbols is aggregated for a code word. Therefrom the strategy is determined, entailing
For the decoding of a data stream which is word-wise protected against errors by a double Reed-Solomon code with symbol-wise interleaving over the code words, first the reliability information for the constituent symbols is aggregated for a code word. Therefrom the strategy is determined, entailing the number of erase symbols and the maximum number of error symbols to be corrected. The correction result is compared with a reliability code and on the basis thereof all symbols obtain an at least trivalent secondary reliability indication for decoding in the second code.
대표청구항▼
A decoding device for a stream of successive code symbols which are protected against symbol errors by a pair of a first and a second cross-interleaved Reed-Solomon codes, the respective symbols of any particular multi-symbol code word of the second code all belonging to different multi-symbol code
A decoding device for a stream of successive code symbols which are protected against symbol errors by a pair of a first and a second cross-interleaved Reed-Solomon codes, the respective symbols of any particular multi-symbol code word of the second code all belonging to different multi-symbol code words of the first code, comprising: a first input for receiving code symbols of the first code, each associated with a reliability information code in the form of at least one reliability bit; storage means connected to said first input for storing data symbols of code words of the first code as received, data symbols of code words of the second code, and said reliability information code, said data symbols of the first code if corrected for an error therein by means of the first code, being stored after such correction, until at least all symbols of the relevant code word of the second code are stored together in said storage means, a first strategy-determining device connected to said first input for receiving, for each code word of the first code, the reliability information code of the symbols contained in the first code word, generating an aggregate reliability information signal for this code word, and generating a strategy indicating signal, said strategy indicating signal identifying a predetermined fixed number of erase symbols in said first code word and also a maximum number of error symbols above said fixed number of erase symbols that is accepted as being correctable, and further, generating a risk indication code (FHCO); first arithmetic means for receiving all symbols of any code word of the first code and generating therefrom associated first syndrome symbols for such code word; second arithmetic means connected to said first strategy-determining device for receiving said strategy-indicating signal, connected to said first arithmetic means for receiving said first syndrome symbols, connected to said storage means for accessing selected code symbols and said associated reliability information code for correcting said code symbol by means of an error value calculated therefor, and returning such corrected code symbols to said storage means, and for generating word-wise signalization information (UEP, ERUF, NCE, NSFL) signalling a measure of decoding success; flag processing means including flag hardening element connected to said second arithmetic means for receiving such word-wise signalization information, and to said first strategy-determining device for receiving said risk-indicating code, and generating therefrom for each code symbol of the first code word, a secondary flag information (O, F3, F2, F1) having a value range of at least three discrete values; and indicating a secondary reliability; and further processing means connected to said storage means for receiving code symbols associated with a code word of the second code and associated secondary flag information, for generating therefrom second syndrome symbols, error locator information, and error value information calculated therefor, and supplying data symbols of a code word of the second code after error processing on a user output.
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이 특허에 인용된 특허 (5)
Snyder ; Jr. John S. (Monrovia MD), Analog threshold decoder.
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