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Apparatus for assigning addresses to pluggable modules based on contact configuration 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-012/00
  • G06F-013/00
출원번호 US-0681184 (1984-12-13)
우선권정보 DE-3347357 (1983-12-28)
발명자 / 주소
  • Gnkel Hans-Dieter (Erlangen DEX) Rhrle Josef (Hessdorf DEX)
출원인 / 주소
  • Siemens Aktiengesellschaft (Munich DEX 03)
인용정보 피인용 횟수 : 24  인용 특허 : 8

초록

In order to feed to pluggable electronic modules addresses for an address-controlled data exchange with a control unit, a module code characterizing the type of module is stored in each module in a first memory. A plug location code is further communicated to each module via a transmitter. During an

대표청구항

A circuit arrangement comprising a plurality of electronic circuit modules interconnected by bus means for communicating address, data and control information between the modules and a control unit, the modules being coupled to a module carrier by respective plug connection means, a plug location be

이 특허에 인용된 특허 (8)

  1. Kaufman Phillip A. (Irvine CA) Gorman Kenneth C. (Mission Viejo CA) Henry George C. (Mission Viejo CA) Blacksher Roy (Santa Ana CA), Automatic modular memory address allocation system.
  2. Waite Robert J. (Huntington Beach CA) Almeida Ronald P. (Yorba Linda CA), Card keying device.
  3. Czeschka Franz (Rechberghausen DEX) Singer Rudi (Wschenbeuren DEX), Coded transfer plug system.
  4. Shah Bakul V. (Palo Alto CA) Maskevitch James A. (Palo Alto CA), Data processing system having automatic configuration.
  5. Wunsch Reinhold (Friedrich-Ebert Str. 62 D-4150 Krefeld DEX) Lezius Albrecht (Corneliusplatz 65 D-4154 Tnisvorst 1 DEX), Free-programmable, modular control system with integrated user definable display and operating devices.
  6. Mantellina Calogero (Cerro Maggiore ITX) Zanzottera Daniele (Busto Garolfo ITX) Gelmetti Marco (Milano ITX), Memory module selection and reconfiguration apparatus in a data processing system.
  7. Panepinto ; Jr. William (Tewksbury MA) Nibby ; Jr. Chester M. (Peabody MA), Memory present apparatus.
  8. Vincent, Geoffrey P. F.; Ing-Simmons, Nicholas K. D.; McGrath, John; Conrad, Marvin C., Self-configuring digital processor system with global system.

이 특허를 인용한 특허 (24)

  1. Stanley Lawrence G., Addressable devices with interface modules having electrically readable addresses.
  2. Ashkin Peter B. (Los Gatos CA) Clark Michael (Glendale CA), Apparatus for transferring signals and data under the control of a host computer.
  3. Siefert, David M., Automated configuration of computer accessories.
  4. Morgan David K. (Hopkinton MA), Automatic sizing memory system with multiplexed configuration signals at memory modules.
  5. Fritsche David L. (Tempe AZ), Cluster controller memory arbiter.
  6. Heath Chester A. (Boca Raton FL) Langgood John K. (Boca Raton FL) Valli Ronald E. (Pittsburgh PA), Computer system with automatic initialization of pluggable option cards.
  7. Bofferding, Nicholas E.; Lo, Erlander; Patel, Kanisha, Dynamically updating alias location codes with correct location codes during concurrent installation of a component in a computer system.
  8. Doerenberg Frank ; McElroy Jim, Fault tolerant data bus.
  9. Doerenberg,Frank M. G.; Topic,Michael, Fault tolerant data communication network.
  10. Nilsson Sven-Axel (Deisenhoffen OR DEX) Budde David (Portland OR), High-availability computer system with a predefinable configuration of the modules.
  11. Cowell Thomas Michael, Memory presence and type detection using multiplexed memory select line.
  12. Cowell Thomas Michael, Memory system with memory presence and type detection using multiplexed memory line function.
  13. Bealkowski Richard ; Turner Michael Robert, Method and apparatus for dynamically assigning programmable option select identifiers.
  14. Simon, Olaf, Method for assigning addresses to nodes of a bus system, and installation.
  15. Simon, Olaf, Method for assigning addresses to nodes of a bus system, and installation.
  16. Ashkin Peter B. (Los Gatos CA) Clark Michael (Glendale CA), Method for requesting service by a device which generates a service request signal successively until it is serviced.
  17. Ashkin Peter B. (Los Gatos CA) Clark Michael (Glendale CA), Method for selectively activating and deactivating devices having same first address and different extended addresses.
  18. Ashkin Peter B. (Gatos CA) Clark Michael (Glendale CA), Method for storing a second number as a command address of a first peripheral device and a third number as a command add.
  19. Yonekura Mikio (Hachioji JPX) Kinoshita Jiro (Yamato JPX), Method of allocating board slot numbers with altering software.
  20. Ueda Shigeru (Wako JPX), Printer interface apparatus with plug-in unit authorized for reception of data upon type verification.
  21. Jeffries Kenneth Layton, System and method for assigning unique addresses to agents on a system management bus.
  22. Gephardt Douglas D., System for effecting communications between a computing device and a plurality of peripheral devices.
  23. Solosky, Rick; Evers, John, Universal opto-coupled voltage system.
  24. Smith,Jack R; Ventrone,Sebastian R, Voltage level bus protocol for transferring data.
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