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Hybrid and multi-layer circuitry 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-007/06
출원번호 US-0811905 (1985-12-20)
발명자 / 주소
  • Pryor Michael J. (Woodbridge CT) Leedecke Charles J. (Northford CT) Masse Norman G. (Wallingford CT)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 33  인용 특허 : 12

초록

The present invention is directed to the process of forming a multi-layer or hybrid circuit assembly. The assembly includes at least one ceramic substrate having a deoxidized or oxygen free copper alloy foil bonded thereto by a bonding glass. The copper alloy foil may be a circuit to which a resisti

대표청구항

A circuit assembly, comprising: a ceramic substrate, a layer of copper alloy foil, said copper alloy selected from the group consisting of oxygen free and deoxidized copper alloy; and a layer of bonding glass which forms a flowable mass at a temperature below about 1000°C. bonding the ceramic substr

이 특허에 인용된 특허 (12)

  1. Butt Sheldon H. (Godfrey IL), Composites of glass-ceramic to metal seals and method of making the same.
  2. Batra Ravi (Rockaway NJ) Taubenblat Pierre W. (Highland Park NJ), Copper alloys with small amounts of manganese and selenium.
  3. Hoffman ; Lewis Charles, Copper metallizations.
  4. Spinelli, Thomas S.; Manns, William G.; Weirauch, Donald F., Electronic circuit interconnection system.
  5. Kumar Ananda H. (Wappingers Falls NY) McMillan Peter W. (Leamington Spa NY GB2) Tummala Rao R. (Wappingers Falls NY), Glass-ceramic structures and sintered multilayer substrates thereof with circuit patterns of gold, silver or copper.
  6. Niwa Koichi (Tama JPX) Murase Teruo (Tokorozawa JPX) Fujimori Masatoshi (Musashino JPX) Murakawa Kyohei (Yokohama JPX), Method of manufacturing multilayer ceramic board.
  7. Ogihara Satoru (Hitachi JPX) Ura Mitsuru (Hitachi JPX) Suzuki Yoshihiro (Hitachi JPX), Multilayer circuit board.
  8. Yamada Seiichi (Machida JPX) Kamehara Nobuo (Machida JPX) Hashimoto Kaoru (Yamato JPX) Yokoyama Hiromitsu (Yokohama JPX) Niwa Koichi (Tama JPX) Murakawa Kyohei (Yokohama JPX), Multilayer circuit boards.
  9. Narken Bernt (Poughkeepsie NY) Tummala Rao R. (Wappingers Falls NY), Multilayered glass-ceramic substrate for mounting of semiconductor device.
  10. Tosaki Hiromi (Yokohama JPX) Sugishita Nobuyuki (Yokosuka JPX) Ikegami Akira (Yokohama JPX), Process for manufacturing a multilayer circuit board.
  11. Honda Norio (Kawasaki JPX) Sugahara Takehisa (Kawasaki JPX), Semiconductor device.
  12. Baudry Hugues (Villecresnes FRX) Monneraye Marc A. (Saint-Maur FRX), Silk-screening dielectric paste for multilayer circuit fabrication comprising aluminum oxide and a borosilicate glass.

이 특허를 인용한 특허 (33)

  1. Tarzaiski Richard J. (Magnolia NJ) Hwang Richard C. (Mt. Laurel Township ; Burlington County both of NJ), Analog to digital converter with multilayer printed circuit mounting.
  2. Bloom,Terry R., Ball grid array package.
  3. Poole, David; Bloom, Terry R.; Cooper, Richard, Ball grid array package having testing capability after mounting.
  4. Bloom Terry R. ; Burry Stephen W. ; Seffernick Lewis L. ; VandenBoom Robert M. ; Zdanys ; Jr. John, Ball grid array resistor network.
  5. Kondo Kazuo (Aichi JPX) Morikawa Asao (Aichi JPX), Ceramic substrate.
  6. Panicker Ramachandra M. P. (Camarillo CA) Agarwal Anil K. (Poway CA), Ceramic substrate with metal filled via holes for hybrid microcircuits and method of making the same.
  7. Ohashi, Yoshio; Shikata, Kunihide, Circuit board and electronic apparatus including the same.
  8. Li, Yuan-Liang; He, Jiangqi; Zhong, Dong; Figueroa, David G., Circuit board with trace configuration for high-speed digital differential signaling.
  9. Li,Yuan Liang; He,Jiangqi; Zhong,Dong; Figueroa,David G., Circuit board with trace configuration for high-speed digital differential signaling.
  10. Li,Yuan Liang; He,Jiangqi; Zhong,Dong; Figueroa,David G., Circuit board with trace configuration for high-speed digital differential signaling.
  11. Troianello Anthony E., Electro-pyrotechnic initiator.
  12. SinghDeo Narendra N. (New Haven CT) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Electronic packaging of components incorporating a ceramic-glass-metal composite.
  13. Zeitlin Dan B. (Annapolis MD) Branthover John B. (Daytona MD) Smith Brian H. (Easton MD) Piloto Andrew J. (Columbia MD) Lengel Theresa M. (Ellicott City MD) Carlson ; Jr. Robert R. (Severn MD) Shum L, High performance, high current miniaturized low voltage power supply.
  14. Kelley, Kurtis Chad; Rockwood, Jill Elizabeth, High temperature electrically conductive material.
  15. Mess, Leonard E., Interposer for electrically coupling a semiconductive device to an electrical apparatus.
  16. Hsu, Che-Wei; Hsu, Shih-Ping; Chou, Pao-Hung, Manufacturing method of package substrate with metal on conductive portions.
  17. Marczi, Michael T.; Koep, Paul; de Monchy, Michiel A.; Finke, Martinus N; Lewis, Brian, Materials for use with interconnects of electrical devices and related methods.
  18. Cherukuri Satyam C. (West Haven CT), Metal sealing glass composite with matched coefficients of thermal expansion.
  19. Haq Samuel F. ; Malone Patrick F. ; Fortney John H. ; Varner Donald P., Method of making ceramic substrate.
  20. Bujatti Marina (Palo Alto CA) Sechi Franco N. (Palo Alto CA), Method of manufacturing a microwave intergrated circuit substrate including metal lined via holes.
  21. Kang, Myung Sam; Park, Jeong Woo; Kim, Ok Tae; Yun, Kil Yong, Method of manufacturing a printed circuit board having metal bumps.
  22. Mess, Leonard E., Method of testing a semiconductor device.
  23. Enomoto Ryo,JPX, One-sided circuit board for multi-layer printed wiring board, multi-layer printed wiring board, and method of its production.
  24. Hsu, Che-Wei; Hsu, Shih-Ping; Chou, Pao-Hung, Package substrate with metal on conductive portions and manufacturing method thereof.
  25. Wang, Alan E.; Olson, Kevin C.; Pawlik, Michael J., Process of fabricating a circuit board.
  26. Koh Wei NMI ; Louie Wesley J., Process of vacuum annealing a thin film metallization on high purity alumina.
  27. Cherukuri Satyam C. (West Haven CT), Sealing glass for matched sealing of copper and copper alloys.
  28. Cherukuri Satyam C. (West Haven CT) Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  29. Hirokazu Ezawa JP; Masahiro Miyata JP, Semiconductor device manufacturing method.
  30. Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Semiconductor package.
  31. Olson,Kevin C.; Wang,Alan E.; Elenius,Peter; Goodman,Thomas W., Single or multi-layer printed circuit board with improved via design.
  32. Mess, Leonard E., System for electronically coupling a device to an electrical apparatus.
  33. Horiuchi, Michio; Tokutake, Yasue; Matsuda, Yuichi; Yamasaki, Tomoo, Wiring substrate, its manufacturing method, and semiconductor device.
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