$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Interconnection package suitable for electronic devices and methods for producing same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-007/02
출원번호 US-0918563 (1986-10-20)
발명자 / 주소
  • Werther William E. (Glen Cove NY)
출원인 / 주소
  • Kollmorgen Technologies Corporation (Dallas TX 02)
인용정보 피인용 횟수 : 51  인용 특허 : 0

초록

An interconnecting package for attaching electronic devices, such as semiconductor chips, to an interconnection board and processes for the production and mounting thereof. The interconnection package comprises a multiplicity of metallic leads or pins aligned in a regular array and a first substrate

대표청구항

An interconnection package for attaching electronic devices, such as semiconductor chips, to an interconnection board, comprising: a multiplicity of metallic leads or pins aligned in a regular array; a first substrate of molded plastic material around said metallic leads or pins, said metallic leads

이 특허를 인용한 특허 (51)

  1. Vinciarelli,Patrizio; Briere,Michael; Dumas,Jeffrey Gordon, Active filtering.
  2. Hoffmeyer, Mark Kenneth; Johnson, Daniel Scott, Adhesive-less cover on area array bonding site of circuit board.
  3. Saxelby ; Jr. John R. ; Hedlund ; III Walter R., Apparatus for circuit encapsulation.
  4. Kim Ji-Sang,KRX, Circuit board.
  5. John R. Saxelby, Jr. ; Walter R. Hedlund, III, Circuit encapsulation.
  6. Saxelby, Jr., John R.; Hedlund, III, Walter R., Circuit encapsulation.
  7. Saxelby ; Jr. John R. ; Hedlund ; III Walter R., Circuit encapsulation process.
  8. Grebe Robert K. (Scottsdale AZ) Lucius John E. (Glendale AZ) Szczesny David S. (Glendale AZ), Component-carrying adapter for chip carrier socket.
  9. Vinciarelli,Patrizio; Prager,Jay, Components having actively controlled circuit elements.
  10. Buschbom Milton L., Contactor for test applications including membrane carrier having contacts for an integrated circuit and pins connectin.
  11. Baudouin Daniel A. (Missouri City TX) Russell Ernest J. (Richmond TX), Edge-mounted, surface-mount package for semiconductor integrated circuit devices.
  12. Akram, Salman; Hembree, David R.; Farnworth, Warren M., Electrical connector.
  13. David R. Hembree, Electrical connector.
  14. Burns, Thomas K.; Croasmun, Dale A.; Salas, Francisco, Electrical connector and method of manufacture.
  15. Evans Michael D. ; Goss James D. ; Curhan Jeffrey A. ; Vinciarelli Patrizio, Making a connection between a component and a circuit board.
  16. Kuo,Cheng Hsien; Jiang,Ming Jhy; Yu,Cheng Kang; Chuang,Hui Chuan, Memory card structure.
  17. Lee, Michael G., Method and system for providing an aligned semiconductor assembly.
  18. Kung, Shao-Tsu; Liu, Chen-Hua, Method for attaching an integrated circuit package to a circuit board.
  19. Akram, Salman; Farnworth, Warren M., Method of forming recessed socket contacts.
  20. Farnworth, Warren M., Method of forming socket contacts.
  21. Farnworth,Warren M., Method of forming socket contacts.
  22. Akram, Salman; Hembree, David R.; Farnworth, Warren M., Methods for electrical connector.
  23. Werther William E. (Wood Ranch CA), Methods for interconnecting integrated circuits.
  24. Akram, Salman; Hembree, David R.; Farnworth, Warren M., Methods for the fabrication of electrical connectors.
  25. Hernandez Jorge M. (Mesa AZ), Molded integrated circuit package incorporating decoupling capacitor.
  26. Hernandez Jorge M. (Mesa AZ), Molded integrated circuit package incorporating thin decoupling capacitor.
  27. Daeche,Frank; Dangelmaier,Jochen; Paulus,Stefan; Stadler,Bernd; Theuss,Horst; Weber,Michael, Multilayer circuit carrier, panel, electronic device, and method for producing a multilayer circuit carrier.
  28. McShane Michael B. (Austin TX) Lin Paul T. (Austin TX) Wilson Howard P. (Austin TX), Packaged semiconductor device having a low cost ceramic PGA package.
  29. Vinciarelli Patrizio (Boston MA) Finnemore Fred (North Reading MA) Balog John S. (Mendon MA) Johnson Brant T. (Concord MA), Packaging electrical components.
  30. Vinciarelli Patrizio ; Finnemore Fred ; Balog John S. ; Johnson Brant T., Packaging electrical components.
  31. Silverman, Lawrence H., Pocket mounted chip having microstrip line.
  32. Oka, Seiji; Obiraki, Yoshiko; Oi, Takeshi, Power semiconductor device.
  33. Oka, Seiji; Idaka, Shiori; Yoshida, Hiroshi, Power semiconductor device, printed wiring board, and mechanism for connecting the power semiconductor device and the printed wiring board.
  34. Yamagishi,Yasuo, Probe card and testing method of semiconductor chip, capacitor and manufacturing method thereof.
  35. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (New Haven CT) Bridges William G. (San Jose CA), Process for manufacturing plastic pin grid arrays and the product produced thereby.
  36. Akram,Salman; Farnworth,Warren M., Process of forming socket contacts.
  37. Fago, Frank M.; Bantly, Matt; Wilson, David W., Radiopharmaceutical pig.
  38. Fago, Frank M.; Wilson, David W.; Bantly, Matt, Radiopharmaceutical pig.
  39. Fago,Frank M.; Bantly,Matt; Wilson,David W., Radiopharmaceutical pig.
  40. Call Anson Jay (Holmes NY) Buchwalter Stephen Leslie (Hopewell Junction NY) Iruvanti Sushumna (Wappingers Falls NY) Jasne Stanley J. (Yorktown NY) Pompeo ; Jr. Frank L. (Walden NY) Zucco Paul Anthony, Reworkable polymer chip encapsulant.
  41. Call Anson Jay ; Buchwalter Stephen Leslie ; Iruvanti Sushumna ; Jasne Stanley J. ; Pompeo ; Jr. Frank L. ; Zucco Paul Anthony ; Moreau Wayne Martin, Reworkable polymer chip encapsulant.
  42. Hopfer Albert N. ; Allard Edward M., Socket assembly for electrical component.
  43. Brofman Peter Jeffrey ; Ghosal Balaram ; Jackson Raymond Alan ; Lidestri Kathleen Ann ; Puttlitz ; Sr. Karl J. ; Sablinski William Edward, Socketable bump grid array shaped-solder on copper spheres.
  44. Brofman Peter Jeffrey ; Ghosal Balaram ; Jackson Raymond Alan ; Lidestri Kathleen Ann ; Puttlitz ; Sr. Karl J. ; Sablinski William Edward, Socketable bump grid array shaped-solder on copper spheres.
  45. Werther William E., Space-saving assemblies for connecting integrated circuits to circuit boards.
  46. Jessep, Rebecca A.; Boggs, David W.; McCormick, Carolyn; Dungan, John H.; Sato, Daryl A., Standoff devices and methods of using same.
  47. Watanabe Hideki,JPX ; Imai Tsutomu,JPX ; Yamaguchi Takeshi,JPX ; Netsu Tositada,JPX ; Kasai Kenichi,JPX ; Imahashi Fumio,JPX ; Ezaki Satoru,JPX ; Shirai Mitugu,JPX, Surface mounting structure.
  48. Kwong, Herman; Wyrzykowska, Aneta; Difilippo, Luigi, Technique for interconnecting multilayer circuit boards.
  49. Barrett Keith E., Test interposer for use with ball grid array packages assemblies and ball grid array packages including same and methods.
  50. Keith E. Barrett, Test interposer for use with ball grid array packages, assemblies and ball grid array packages including same, and methods.
  51. Hiroki Kato JP, Wiring board, method for producing same, display device, and electronic device.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로