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Process for manufacturing plastic pin grid arrays and the product produced thereby 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0052327 (1987-05-21)
발명자 / 주소
  • Bridges William G. (Meriden CT) Armer Thomas A. (New Haven CT) Chang Kin-Shiung (Meriden CT)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 30  인용 특허 : 10

초록

A process for forming an integral circuit pin grid array package comprising a flexible metal tape adapted for use in tape automated bonding with a plurality of holes. Terminal pins are inserted in the holes and the tape and pins are disposed within a mold so that a cavity is formed about the pins an

대표청구항

The process of forming an integrated circuit pin grid array package, comprising the steps of: (a) providing an interconnect tape defining a metal interconnect circuit pattern, said tape having first and second opposing surfaces, said circuit pattern defining a plurality of leads; (b) forming a plura

이 특허에 인용된 특허 (10)

  1. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Adhesion primers for encapsulating epoxies.
  2. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Adhesion primers for encapsulating epoxies.
  3. Alemanni, James C., Carrier for pin grid array.
  4. Newton Edward L. (Tempe AZ) Swendrowski Steven D. (Chander AZ), Carrier for tape automated bonded semiconductor device.
  5. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Casing for electronic components.
  6. Bennett, Benny M.; Meehan, Robert F.; Zell, Dale R., Modular receptacle pin grid array.
  7. Chia Chok J. (Santa Clara CA), Molded pin grid array package GPT.
  8. Theobald Paul R. (Signal Mountain TN), Plastic chip carrier package.
  9. Muehling Richard (Cranston RI), Plastic pin grid array chip carrier.
  10. Jung James E. (Westfield IN) Koors Mark A. (Kokomo IN) Lutz Phillip A. (Kokomo IN), Surface mount package for encapsulated tape automated bonding integrated circuit modules.

이 특허를 인용한 특허 (30)

  1. Sei Akinori,JPX ; Tsukamoto Yoshikazu,JPX ; Shiozawa Takashi,JPX ; Ohishi Tadahiro,JPX ; Narushima Hitoshi,JPX, Adhesive tape for tape automated bonding.
  2. Mahulikar Deepak ; Hoffman Paul R. ; Braden Jeffrey S., Ball grid array electronic package.
  3. Elkhatib, Hecham K.; McGrath, James L.; Mendenhall, David W.; MacKillop, William J.; Raclawski, Alan A., Cable assembly with a material at an edge of a substrate.
  4. Elkhatib, Hecham K.; McGrath, James L.; Mendenhall, David W.; MacKillop, William J.; Raclawski, Alan A., Cable assembly with printed circuit board having a ground layer.
  5. Isoda, Takeshi; Shinoda, Koji, Device module and method of manufacturing the same.
  6. Jiang,Tongbi, Die attach material for TBGA or flexible circuitry.
  7. McGrath, James L.; Mendenhall, David W.; Elkhatib, Hecham K.; MacKillop, William J.; Raclawski, Alan A., Electrical connector.
  8. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L., Fabricating interconnects and tips using sacrificial substrates.
  9. Khandros Igor Y. ; Mathieu Gaetan L., Interconnection substrates with resilient contact structures on both sides.
  10. Mahulikar Deepak (Meriden CT) Crane Jacob (Woodbridge CT) Braden Jeffrey S. (Milpitas CA), Kit for the assembly of a metal electronic package.
  11. Beyne, Eric; Limaye, Paresh, Method for insertion bonding and device thus obtained.
  12. Bianca Giuseppe ; Bogursky Robert M., Method for making a continuous carrier for electrical or mechanical components.
  13. Chen, I-Ming, Method for manufacturing a low-profile semiconductor device.
  14. Isoda, Takeshi; Shinoda, Koji, Method of manufacturing a device module.
  15. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
  16. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
  17. Dibble Eric P. ; Laine Eric H. ; MacQuarrie Stephen W., Pin attach structure for an electronic package.
  18. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
  19. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (New Haven CT) Bridges William G. (San Jose CA), Process for manufacturing plastic pin grid arrays and the product produced thereby.
  20. Eric P. Dibble ; Eric H. Laine ; Stephen W. MacQuarrie, Process of producing plastic pin grid array.
  21. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (Westborough MA) Braden Jeffrey S. (Milpitas CA) Anderson George A. (Old Lyme CT), Process plate for plastic pin grid array manufacturing.
  22. Bianca Giuseppe ; Bogursky Robert M., Secondary processing for electrical or mechanical components molded to continuous carrier supports.
  23. Benante, Anthony F., Semiconductor chip mounting system.
  24. Miyakoshi, Masaoki, Semiconductor device.
  25. Chigawa Yasuhide,JPX ; Fujiyama Ippei,JPX ; Matsuda Kenji,JPX, Semiconductor device and a manufacturing method thereof.
  26. Chigawa Yasuhide,JPX ; Fujiyama Ippei,JPX ; Matsuda Kenji,JPX, Semiconductor device and a manufacturing method thereof.
  27. Nishizawa, Tatsuo; Tada, Shinji; Kinoshita, Yoshito; Ikeda, Yoshinari; Mochizuki, Eiji, Semiconductor device and method for manufacturing the semiconductor device.
  28. Nishizawa, Tatsuo; Tada, Shinji; Kinoshita, Yoshito; Ikeda, Yoshinari; Mochizuki, Eiji, Semiconductor device and method for manufacturing the semiconductor device.
  29. Dozier ; II Thomas H. ; Khandros Igor Y., Solder preforms.
  30. Mori Yoichi,JPX ; Aoki Yoshihiro,JPX, Testing IC socket.
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