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Time constant automatic adjustment circuit for a filter circuit 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-003/20
출원번호 US-0074723 (1987-07-17)
우선권정보 JP-0169234 (1986-07-18)
발명자 / 주소
  • Kawano Mitsumo (Honjo JPX)
출원인 / 주소
  • Kabushiki Kaisha Toshiba (Kanagawa JPX 03)
인용정보 피인용 횟수 : 66  인용 특허 : 2

초록

An automatic adjustment circuit for adjusting the time constant of a filter circuit. The adjustment circuit includes a source of reference frequency signal, an oscillator for generating an oscillation signal, and a detector for detecting the difference in one of phase and frequency between the refer

대표청구항

An automatic adjustment circuit for adjusting a filter circuit, the filter circuit having a time constant, the adjustment circuit adjusting the time constant and receiving a reference frequency signal, said adjustment circuit comprising: oscillation means for generating an oscillation signal, said o

이 특허에 인용된 특허 (2)

  1. Masdea Arturo (Rome ITX) Quagliarello Giuseppe (Rome ITX), Automatic tuning circuits for voltage controlled filters, by digital phase control.
  2. Okada Yoshinori (Katsuta JPX) Fukushima Isao (Katsuta JPX) Miura Kuniaki (Ibaraki JPX) Kano Kenji (Mito JPX), Integrated filter circuit with variable frequency characteristics.

이 특허를 인용한 특허 (66)

  1. Darabi, Hooman; Rofougaran, Ahmadreza; Khorram, Shahla; Ibrahim, Brima, Adaptive radio transceiver with filtering.
  2. Darabi,Hooman; Rofougaran,Ahmadreza; Khorram,Shahla; Ibrahim,Brima, Adaptive radio transceiver with filtering.
  3. Darabi,Hooman; Rofougaran,Ahmadreza; Khorram,Shahla; Ibrahim,Brima, Adaptive radio transceiver with filtering.
  4. Kawano Mitsumo,JPX, Automatic compensation circuit for automatically compensating time constant of filter.
  5. Ishiguro, Kazuhisa, Automatic regulator of filter.
  6. Confalonieri, Pierangelo; Martignone, Riccardo; Zamprogno, Marco, Calibration circuit for calibrating an adjustable capacitance of an integrated circuit having a time constant depending on said capacitance.
  7. Canclini Athos, Device and method for calibrating a time constant of one or more filter circuits.
  8. Ward, Christopher M.; Vorenkamp, Pieter, Differential crystal oscillator.
  9. Kamata,Takatsugu; Okui,Kazunori, Discrete inductor bank and LC filter.
  10. Woo,Agnes Neves; Chen,Chun Ying, ESD configuration for low parasitic capacitance I/O.
  11. Woo, Agnes Neves, ESD protection for high voltage applications.
  12. Woo,Agnes Neves, ESD protection for high voltage applications.
  13. Koyama Jun (Tokyo JPX), Filter circuit arrangements with automatic adjustment of cut-off frequencies.
  14. Kamada, Mikio, Filter device and control method of the same.
  15. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank; Ward, Christopher M.; Duncan, Ralph; Kwan, Tom W.; Chang, James Y. C.; Khorramabadi, Haideh, Fully integrated tuner architecture.
  16. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank; Ward, Christopher M.; Duncan, Ralph; Kwan, Tom W.; Chang, James Y. C.; Khorramabadi, Haideh, Fully integrated tuner architecture.
  17. Vorenkamp,Pieter; Bult,Klaas; Carr,Frank; Ward,Christopher M.; Duncan,Ralph; Kwan,Tom W.; Chang,James Y. C.; Khorramabadi,Haideh, Fully integrated tuner architecture.
  18. Vorenkamp,Pieter; Bult,Klaas; Carr,Frank; Ward,Christopher M.; Duncan,Ralph; Kwan,Tom W.; Chang,James Y. C.; Khorramabadi,Haideh, Fully integrated tuner architecture.
  19. Kamata,Takatsugu; Utsunomiya,Kimitake, Image rejection quadratic filter.
  20. Kattner, Axel; Moll, Holger, Integrated DVB filter.
  21. Duncan, Ralph; Kwan, Tom W., Integrated VCO having an improved tuning range over process and temperature variations.
  22. Duncan,Ralph; Kwan,Tom W., Integrated VCO having an improved tuning range over process and temperature variations.
  23. Chang, James Y. C., Integrated spiral inductor.
  24. Bult, Klaas; Gomez, Ramon A., Integrated switchless programmable attenuator and low noise amplifier.
  25. Bult, Klaas; Gomez, Ramon A., Integrated switchless programmable attenuator and low noise amplifier.
  26. Bult, Klaas; Gomez, Ramon A., Integrated switchless programmable attenuator and low noise amplifier.
  27. Bult,Klaas; Gomez,Ramon A., Integrated switchless programmable attenuator and low noise amplifier.
  28. Hassner Martin ; Koyama Seiji,JPX ; Nozawa Tohru,JPX ; Terukina Asao,JPX ; Tetsuya Tamura,JPX, Integrator with output-compensating capability.
  29. Behzad, Arya R., Large gain range, high linearity, low noise MOS VGA.
  30. Behzad, Arya R., Large gain range, high linearity, low noise MOS VGA.
  31. Behzad,Arya R., Large gain range, high linearity, low noise MOS VGA.
  32. Chang Jun Oh KR; Jong Kee Kwon KR; Jong Ryul Lee KR; Won Chul Song KR; Hee Bum Jung KR; Kyung Soo Kim KR; Han Jin Cho KR; Ook Kim KR, Low offset automatic frequency tuning circuits for continuous-time filter.
  33. Kamata,Takatsugu, MOSFET temperature compensation current source.
  34. Kamata, Takatsugu; Okui, Kazunori, Methods and apparatus for an improved discrete LC filter.
  35. Kamata,Takatsugu; Okui,Kazunori, Methods and apparatus for an improved discrete LC filter.
  36. Utsunomiya,Kimitake; Kamata,Takatsugu, Methods and apparatus for implementing a receiver on a monolithic integrated circuit.
  37. Wong, Lance M., Methods and apparatus for tuning successive approximation.
  38. Chang, James Y. C., Multi-track integrated circuit inductor.
  39. Chang, James Y. C., Multi-track integrated spiral inductor.
  40. Ward, Christopher M.; Vorenkamp, Pieter, Phase locked loop.
  41. Utsunomiya,Kimitake; Kamata,Takatsugu, Quadratic nyquist slope filter.
  42. Kamata,Takatsugu; Utsunomiya,Kimitake, Quadratic video demodulation with baseband nyquist filter.
  43. Kamata,Takatsugu; Okui,Kazunori, Radio frequency inductive-capacitive filter circuit topology.
  44. Agnes N. Woo ; Kenneth R. Kindsfater ; Fang Lu, System and method for ESD Protection.
  45. Woo, Agnes N.; Kindsfater, Kenneth R.; Lu, Fang, System and method for ESD protection.
  46. Woo, Agnes N.; Kindsfater, Kenneth R.; Lu, Fang, System and method for ESD protection.
  47. Woo, Agnes N.; Kindsfater, Kenneth R.; Lu, Fang, System and method for ESD protection.
  48. Woo, Agnes N.; Kindsfater, Kenneth R.; Lu, Fang, System and method for ESD protection.
  49. Woo, Agnes N.; Kindsfater, Kenneth R.; Lu, Fang, System and method for ESD protection.
  50. Woo,Agnes N.; Kindsfater,Kenneth R.; Lu,Fang, System and method for ESD protection.
  51. Woo,Agnes N.; Kindsfater,Kenneth R.; Lu,Fang, System and method for ESD protection.
  52. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, System and method for coarse/fine PLL adjustment.
  53. Vorenkamp,Pieter; Bult,Klaas; Carr,Frank, System and method for coarse/fine PLL adjustment.
  54. Khorramabadi, Haideh, System and method for linearizing a CMOS differential pair.
  55. Khorramabadi,Haideh, System and method for linearizing a CMOS differential pair.
  56. Khorramabadi,Haideh, System and method for linearizing a CMOS differential pair.
  57. Ralph Duncan ; Tom W. Kwan, System and method for narrow band PLL tuning.
  58. Vorenkamp Pieter ; Bult Klaas,NLX ; Carr Frank, System and method for on-chip filter tuning.
  59. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, System and method for on-chip filter tuning.
  60. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, System and method for on-chip filter tuning.
  61. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, System and method for on-chip filter tuning.
  62. Carr,Frank; Vorenkamp,Pieter, System and method for providing a low power receiver design.
  63. Frank Carr ; Pieter Vorenkamp, System and method for providing a low power receiver design.
  64. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, Temperature compensation for internal inductor resistance.
  65. Vorenkamp, Pieter; Bult, Klaas; Carr, Frank, Temperature compensation for internal inductor resistance.
  66. Vorenkamp,Pieter; Bult,Klaas; Carr,Frank, Temperature compensation for internal inductor resistance.
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