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특허 상세정보

MyON담기
내보내기 페이스북 공유 카카오톡 공유

Heat dissipating interconnect tape for use in tape automated bonding

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H05K-007/20   
미국특허분류(USC) 361/388 ; 361/421 ; 29/827 ; 206/330
출원번호 US-0134740 (1987-12-18)
발명자 / 주소
  • Voss Scott V. (Portola Valley CA)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 37  인용 특허 : 13
초록

The present invention is directed to electronic packages. A heat dissipating pad positioned over the electrically active face of an electronic device transfers heat from the device to the electronic package or to an external heat sink. A dielectric electrically isolates the heat dissipating pad from the electronic device.

대표
청구항
▼

A package enclosing an electronic device, said electronic device containing electrically active bonding sites on a heat generating face, comprising: a base component; a cover component; a leadframe disposed between said base component and said cover component; a means electrically connecting said electronic component to said leadframe; a head dissipating pad adhesively affixed to said electrically active face of said electronic device said heat dissipating pad additionally containing at least one outwardly extending expandable support member; a first die...

이 특허에 인용된 특허 (13)

  1. Haghiri-Tehrani Yahya (Munich DEX) Hoppe Joachim (Munich DEX), Carrier element for an IC-chip.
  2. Gursky Michael T. (Allentown PA), Carrier tapes for semiconductor devices.
  3. Butt Sheldon H. (Godfrey IL), Casing for an electrical component having improved strength and heat transfer characteristics.
  4. Kaufman Lance R. (131 White Oak Way Mequon WI 53092), Compact circuit package having an improved lead frame connector.
  5. Spinelli, Thomas S.; Manns, William G.; Weirauch, Donald F., Electronic circuit interconnection system.
  6. Butt Sheldon H. (Godfrey IL), Hermetically sealed semiconductor casing.
  7. Adams Anthony L. (McKinney TX), Integrated circuit package having interconnected leads adjacent the package ends.
  8. Burns Carmen D. (San Jose CA), Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices.
  9. Fujita Katsufusa (Kitakyushu JPX), Method of forming a lead frame.
  10. Takiar Hem P. (San Jose CA) Mehta Kamal N. (Sunnyvale CA), Molded semiconductor package having improved heat dissipation.
  11. Kaufman Lance R. (1821 W. Daisy La. Milwaukee WI 53209), Power switching device having improved heat dissipation means.
  12. Butt Sheldon H. (Godfrey IL), Semiconductor packages.
  13. Butt Sheldon H. (Godfrey IL), Tape packages.

이 특허를 인용한 특허 (37)

  1. Burtzlaff,Robert; Haba,Belgacem; Humpston,Giles; Tuckerman,David B.; Warner,Michael; Mitchell,Craig S., Back-face and edge interconnects for lidded package.
  2. Hyun-Chul Kim KR, Bonding pad structure of a semiconductor device and method of fabricating the same.
  3. Isoda, Takeshi; Shinoda, Koji, Device module and method of manufacturing the same.
  4. Hoffman Paul R. ; Popplewell James M. ; Braden Jeffrey S., Edge connectable metal package.
  5. Sur, Biswajit; Vodrahalli, Nagesh; Workman, Thomas, Electronic assembly comprising solderable thermal interface.
  6. Sur,Biswajit; Vodrahalli,Nagesh; Workman,Thomas, Electronic assembly comprising solderable thermal interface and methods of manufacture.
  7. Mahulikar Deepak (Madison CT), Electronic package with improved electrical performance.
  8. Kulinsky, Lawrence, Five layer adhesive/insulator/metal/insulator/adhesive tape for semiconductor die packaging.
  9. Kalfus Martin (Scottsdale) Foutz Eugene L. (Scottsdale AZ), Formed top contact for non-flat semiconductor devices.
  10. Morley, Catherine A.; Krinke, Todd A.; Tangren, John H., Heat dissipation structures for integrated lead disk drive head suspensions.
  11. Beroz,Masud; Warner,Michael; Smith,Lee; Urbish,Glenn; Kang,Teck Gyu; Park,Jae M.; Kubota,Yoichi, High frequency chip packages with connecting elements.
  12. Warner, Michael, High-frequency chip packages.
  13. Warner, Michael, High-frequency chip packages.
  14. Warner,Michael; Smith,Lee; Haba,Belgacem; Urbish,Glenn; Beroz,Masud; Kang,Teck Gyu, High-frequency chip packages.
  15. Bennin Jeffry S. (Hutchinson MN), Integrated gimbal suspension assembly.
  16. Mahulikar Deepak (Meriden CT) Crane Jacob (Woodbridge CT) Braden Jeffrey S. (Milpitas CA), Kit for the assembly of a metal electronic package.
  17. Bennin Jeffry S. ; Boucher Todd ; Green Jeffrey W. ; Gustafson Gary E. ; Jurgenson Ryan ; Lien Brent D., Magnetic head suspension with single layer preshaped trace interconnect.
  18. Bennin, Jeffry S.; Boucher, Todd; Green, Jeffrey W.; Gustafson, Gary E.; Jurgenson, Ryan; Lien, Brent D., Magnetic head suspension with single layer preshaped trace interconnect.
  19. Haba, Belgacem; Kubota, Yoichi, Manufacture of mountable capped chips.
  20. Mahulikar Deepak (Meriden CT) Braden Jeffrey S. (Milpitas CA) Noe Stephen P. (Stratford CT), Metal electronic package having improved resistance to electromagnetic interference.
  21. Isoda, Takeshi; Shinoda, Koji, Method of manufacturing a device module.
  22. Zilber, Gil; Katraro, Reuven; Aksenton, Julia; Oganesian, Vage, Methods and apparatus for packaging integrated circuit devices.
  23. Zilber,Gil; Aksenton,Julia; Oganesian,Vage, Methods and apparatus for packaging integrated circuit devices.
  24. Zilber,Gil; Aksenton,Julia; Oganesian,Vage, Methods and apparatus for packaging integrated circuit devices.
  25. Zilber,Gil; Katraro,Reuven; Aksenton,Julia; Oganesian,Vage, Methods and apparatus for packaging integrated circuit devices.
  26. Fjelstad,Joseph, Methods of making microelectronic packages with conductive elastomeric posts.
  27. Warner,Michael; Haba,Belgacem; Beroz,Masud, Microelectronic assemblies incorporating inductors.
  28. Nystrom, Michael J.; Humpston, Giles, Microelectronic assembly with multi-layer support structure.
  29. Nystrom, Michael J.; Humpston, Giles, Microelectronic assembly with multi-layer support structure.
  30. Braden Jeffrey S. (Milpitas CA), Multi-layer lead frames for integrated circuit packages.
  31. Parthasarathi Arvind (North Branford CT), Multi-metal layer interconnect tape for tape automated bonding.
  32. Shigeru Yamada JP, Semiconductor apparatus and frame used for fabricating the same.
  33. Sirinorakul, Saravuth, Semiconductor package with full plating on contact side surfaces and methods thereof.
  34. Yenrudee, Suebphong; Kongpoung, Chanapat; Hongsongkiat, Sant; Ounkaew, Siriwanna; Injan, Chatchawan; Sirinorakul, Saravuth, Semiconductor package with plated metal shielding and a method thereof.
  35. Honer, Kenneth Allen, Sequential fabrication of vertical conductive interconnects in capped chips.
  36. Takeda Yasushi (Yokohama JPX), Tab film tape carrier.
  37. Stone ; Jr. Earl H. (Essex VT), Tab method for implementing dynamic chip burn-in.

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