초록 ▼

A resettable current limiter is started using an externally generated reset signal, latches on and continues conducting until an overload current is sensed, at which time the limiter shuts off load current. An FET is used both as a series pass element anda load current sensing element. A comparator

A resettable current limiter is started using an externally generated reset signal, latches on and continues conducting until an overload current is sensed, at which time the limiter shuts off load current. An FET is used both as a series pass element anda load current sensing element. A comparator senses the source of drain voltage drop across the FET and provides a shutdown signal to the FET\s gate upon sensing an overload. The limiter may also comprise a solid state switch for positively shutting off the FET using an externally generated off signal. The reset signal reponse circuitry may be set up to be edge triggered to protect against an external short. The reset signal may be a level change or may be a periodic signal. A zener diode may be used for both protecting the FET against excessive voltages and against current surges.

대표청구항 ▼

A self-latching current limiter which limits load current delivered from an input source voltage referenced to a common node to a load referenced to said common node, comprising: a field effect transistor having a gate and a pair of electrodes including a source and a drain, one of said electrodes c

A self-latching current limiter which limits load current delivered from an input source voltage referenced to a common node to a load referenced to said common node, comprising: a field effect transistor having a gate and a pair of electrodes including a source and a drain, one of said electrodes connected to said source voltage and the other of said electrodes connected to said load; a transistor pair connected in common electrode configuration, each having a control electrode, a first one of said pair connected between said common node and said gate to conduct current from said common node to said gate, and a second one connected between said common node and said source voltage; a pair of voltage dividers, each having a junction at which the voltage is a fraction of the voltage across the whole voltage divider, a first one of said voltage dividers connected between said load and said common node and a second one of said voltage dividers connected between said source voltage and said common node, the control electrode of said first transistor being responsive to the voltage at the junction of said first voltage divider and the control electrode of said second transistor being responsive to the voltage at the junction of said second voltage divider, said voltage dividers being adjusted in a manner to cause said first transistor to conduct and said second transistor to not conduct in response to the voltage at said load when said field effect transistor is conducting current in a normal manner to said load, and to cause said first transistor to become nonconductive and said second transistor to become conductive in response to voltage at said load being of a value indicative of a current flow through said field effect transistor greater than a predetermined permissible magnitude; a resistor between said source and said gate responsive to current flow through said first transistor to develop a source-to-gate voltage sufficient to cause said field effect transistor to conduct normally; and reset means for selectively causing current flow in said resistor to develop a source-to-gate-voltage to initialize normal current flow in said field effect transistor.