초록 ▼

A programmable logic device having a relatively small number of programmable product terms (“P-terms”) feeding each fixed combinatorial logic device, and additional “expander”programmable P-terms which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitabl

A programmable logic device having a relatively small number of programmable product terms (“P-terms”) feeding each fixed combinatorial logic device, and additional “expander”programmable P-terms which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitably programming the P-terms feeding the fixed devices. More complex logic functions can be performed by suitably programming the required number of expander P-terms, and then combining the outputs of those P-terms by means of another P-term. In addition, a programmable interconnect array is provided to allow certain inputs to the device to be applied to any programmable portion of the device, and also to allow the outputs of at least one of the fixed devices to be also applied to any programmable portion of the device.

대표청구항 ▼

A programmable logic device for producing a plurality of first signals, each of which is a programmable logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device comprising: a plurality of fi

A programmable logic device for producing a plurality of first signals, each of which is a programmable logical function of a plurality of second signals, each of which is applied to a respective one of a plurality of word line conductors, said programmable logic device comprising: a plurality of first P-term line conductors, each of which is programmably interconnectable to each of said word line conductors for producing on each of said first P-term line conductors a third signal which is a logical function of the second signals applied to the word line conductors to which that first P-term line conductor is interconnected; means for logically combining said third signals to produce a first of said first signals; at least one second P-term line conductor which is programmably interconnectable to each of said word line conductors for producing on said second P-term line conductor a second of said first signals which is a logical function of the second signals applied to the word line conductors to which said second P-term line conductor is interconnected; and means for applying said second of said first signals to one of said word line conductors as the second signal applied to that word line conductor, wherein said first and second P-term line conductors comprise a macrocell, and wherein said apparatus includes a plurality of said macrocells, said word line conductors being common to all of said macrocells.