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Sequentially processing data in a cached data storage system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/00
출원번호 US-0068857 (1987-07-02)
발명자 / 주소
  • Tayler Gerald E. (Berthoud CO) Wagner Robert E. (Tucson AZ)
출원인 / 주소
  • International Business Machines Corporation (Armonk NY 02)
인용정보 피인용 횟수 : 35  인용 특허 : 5

초록

The disclosure relates to sequential performance of a cached data storage subsystem with a minimal control signal processing. Sequential access is first detected by monitoring and examining the quantity of data accessed per unit of data storage (track) across a set of contiguously addressable tracks

대표청구항

In a method of operating a cache which is interposed between a host processor and a backing store, the cache and the backing store including addressable like-capacity data storing tracks, where a track of data is the amount of data storable on one track of a magnetic disk recorder the cache includin

이 특허에 인용된 특허 (5)

  1. Vogelsang Ulrich (Hildesheim DEX), Compact disc (CD) player and method of compensating for tracking jumps.
  2. Tayler Gerald E. (Tucson AZ), Method and apparatus for discarding data from a buffer after reading such data.
  3. Bastian Arlon L. (Pima County AZ) Goldfeder Marc E. (Tucson AZ) Hartung Michael H. (Pima County AZ), Method and apparatus for limiting data occupancy in a cache.
  4. Maury Christian (Voisins le Bx FRX) Lequien Jean (Hargeville FRX) Pinson Denis (Goupillieres FRX), Method of and apparatus for writing data on a recording medium and the medium so produced.
  5. Ogino Yasuo (Yokohama JPX), Optical disk apparatus and track access method therefor.

이 특허를 인용한 특허 (35)

  1. Shah Nilesh (Folsom CA) Ajanovic Jasmin (Folsom CA) Dahmani Dahmane (Folsom CA), Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer.
  2. Apperley Norman (Eastleigh GBX) Buckland Patrick Allen (Austin TX), Apparatus and method for transferring data in a data storage subsystems wherein a multi-sector data transfer order is ex.
  3. Matsunami Naoto,JPX ; Yoshida Minoru,JPX ; Miyazawa Shoichi,JPX ; Oeda Takashi,JPX ; Honda Kiyoshi,JPX ; Ohno Shuji,JPX, Array disk controller for grouping host commands into a single virtual host command.
  4. Macon ; Jr. James F. (Boynton Beach FL) Ong Shauchi (San Jose CA) Shih Feng-Hsien W. (Hsien-Chu TWX), Asynchronous read-ahead disk caching using multiple disk I/O processes adn dynamically variable prefetch length.
  5. Schafer Bruce W. ; Teeters Jeffrey W. ; Chweh Mark C. ; Lee David A. ; O'Connell Daniel P. ; Ramanathan Gowri, Caching apparatus and method for enhancing retrieval of data from an optical storage device.
  6. Brady James T. (San Jose CA) Shomler Robert W. (Morgan Hill CA) Wone May N. (San Jose CA), Compact track address translation mapping system and method.
  7. Genduso Thomas Basilio ; Vanderslice Edward Robert, Computer system having cache prefetching amount based on CPU request types.
  8. Ukai Toshiyuki,JPX ; Shimizu Masaaki,JPX ; Fujita Fujio,JPX, Data prefetch control method for main storage cache for protecting prefetched data from replacement before utilization.
  9. Sokolov Daniel John, Disk drive with cache having entry table prioritized to reduce scanning time for sequential streams.
  10. Harari Eliyahou ; Norman Robert D. ; Mehrotra Sanjay, Flash EEPROM system.
  11. Eliyahou Harari ; Robert D. Norman ; Sanjay Mehrotra, Flash EEprom system.
  12. Eliyahou Harari ; Robert D. Norman ; Sanjay Mehrotra, Flash EEprom system.
  13. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  14. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  15. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  16. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  17. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  18. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay, Flash EEprom system.
  19. Harari,Eliyahou; Norman,Robert D.; Mehrotra,Sanjay, Flash EEprom system.
  20. Harari,Eliyahou; Norman,Robert D.; Mehrotra,Sanjay, Flash EEprom system.
  21. Bulusu Gopi Kumar, Flexible data structure layout for data structure including bit-field data members.
  22. Bulusu Gopi Kumar (Sunnyvale CA), Flexible data structure layout for data structure including bit-field data members.
  23. Hashimoto Yasuichi (Tokyo JPX), Hard disk drive having buffer memory employing directory based cache controller with data replacement scheme.
  24. Cord Joel H. (Tucson AZ) Hartung Michael H. (Tucson AZ) Hyde Joseph S. (Tucson AZ) Legvold Vernon J. (Tucson AZ) Sherman William G. (Tucson AZ), Management system for a hierarchical data cache employing preemptive cache track demotion and restaging to adapt to acce.
  25. Dayan,Richard A., Method and system for cache data fetch operations.
  26. Beardsley Brent Cameron ; Benhase Michael Thomas ; Martin Douglas A. ; Morton Robert Louis ; Reid Mark A., Method and system for managing data in cache.
  27. Beardsley Brent Cameron ; Benhase Michael Thomas ; Martin Douglas A. ; Morton Robert Louis ; Reid Mark A., Method and system for managing data in cache using multiple data structures.
  28. Brent Cameron Beardsley ; Michael Thomas Benhase ; Joseph Smith Hyde ; Thomas Charles Jarvis ; Douglas A. Martin ; Robert Louis Morton, Method and system for staging data into cache.
  29. Lautzenheiser Marvin (Springfield VA), Method for operating a cache memory system using a recycled register for identifying a reuse status of a corresponding c.
  30. Bosinoff Philip R. (San Jose CA) White Charles M. (San Jose CA), Method for selecting computer storage devices for computer applications.
  31. Anderson David P. ; Moorer James A., Method of dynamically allocating network node memory's partitions for caching distributed files.
  32. Harari Eliyahou ; Norman Robert D. ; Mehrotra Sanjay, Multi-state flash EEprom system with cache memory.
  33. Harari Eliyahou ; Norman Robert D. ; Mehrotra Sanjay, Multi-state flash EEprom system with selective multi-sector erase.
  34. Kyo, Shorin, Semiconductor device, memory access control method, and semiconductor device system.
  35. Maeda Yasuhiro (Hokkaido JPX), Storage control system with auxiliary storage and optimized process data length and gap to reduce track and cylinder swi.
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