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Semiconductor package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/10
  • H01L-023/36
출원번호 US-0140859 (1988-01-04)
발명자 / 주소
  • Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 53  인용 특허 : 33

초록

A semiconductor package for an electrical component which has a metal or metal alloy leadframe with first and second surface, which leadframe is adapted to have an electrical component connected thereto. The leadframe is bonded by means of a polymer to a copper or copper alloy base member. The leadf

대표청구항

A semiconductor package for housing an electrical component comprising: a metal or metal alloy leadframe having first and second opposite surfaces and adapted to have said electrical component connected thereto; a copper or copper alloy base member having first and second opposite surfaces with side

이 특허에 인용된 특허 (33)

  1. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Adhesion primers for encapsulating epoxies.
  2. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Adhesion primers for encapsulating epoxies.
  3. Butt Sheldon H. (Godfrey IL), Casing for an electrical component having improved strength and heat transfer characteristics.
  4. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Casing for electronic components.
  5. Matsushita Yasuo (Hitachi JPX) Nakamura Kousuke (Hitachi JPX) Ura Mitsuru (Hitachi JPX) Kobayashi Fumiyuki (Sagamihara JPX), Ceramic packaged semiconductor device.
  6. Butt Sheldon H. (Godfrey IL), Composites of glass-ceramic to metal seals and method of making the same.
  7. Parthasarathi, Arvind, Dendritic treatment of metallic surfaces for improving adhesive bonding.
  8. Fister Julius C. (Hamden CT) Breedis John F. (Trumbull CT), Electrical component forming process.
  9. Fister Julius C. (Hamden CT) Breedis John F. (Trumbull CT), Electrical component forming process.
  10. Polan Ned W. (Madison CT) Chao Chung-Yao (Hamden CT), Electrochemical treatment of copper for improving its bond strength.
  11. Polan Ned W. (Madison CT) Chao Chung-Yao (Hamden CT), Electrochemical treatment of copper for improving its bond strength.
  12. Chu Richard C. (Poughkeepsie NY) Gupta Omkarnath R. (Poughkeepsie NY) Hwang Un-Pah (Poughkeepsie NY) Simons Robert E. (Poughkeepsie NY), Gas encapsulated cooling module.
  13. Popplewell James M. (Guilford CT), Glass or ceramic-to-metal composites or seals involving iron base alloys.
  14. Mahulikar Deepak (Meriden CT) Cherukuri Satyam C. (West Haven CT), Graded sealing systems for semiconductor package.
  15. Calabro Anthony D. (8738 West Chester Pike Upper Darby PA 19082) Marchetti Richard J. (Norristown PA), Heat dissipator for integrated circuit chips.
  16. Johnson, Philip A.; McCarthy, Alfred F., Heat sinks for integrated circuit modules.
  17. Hascoe ; Norman, Hermetically sealed container for semiconductor and other electronic device s.
  18. Butt Sheldon H. (Godfrey IL), Hermetically sealed metal package.
  19. Butt Sheldon H. (Godfrey IL), Hermetically sealed semiconductor casing.
  20. Butt, Sheldon H., High density packages.
  21. Pryor Michael J. (Woodbridge CT), Hybrid and multi-layer circuitry.
  22. Pryor Michael J. (Woodbridge CT) Leedecke Charles J. (Northford CT) Masse Norman G. (Wallingford CT), Hybrid and multi-layer circuitry.
  23. Leedecke Charles J. (Northford CT) Masse Norman G. (Wallingford CT) Pryor Michael J. (Woodbridge CT), Metal-glass laminate and process for producing same.
  24. Butt Sheldon H. (Godfrey IL), Method of assembling a chip carrier.
  25. Butt Sheldon H. (Godfrey IL), Method of making semiconductor casing.
  26. Butt Sheldon H. (Godfrey IL), Multi-layer circuitry.
  27. Butt Sheldon H. (Godfrey IL), Reinforced glass composites.
  28. Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  29. Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  30. Cherukuri Satyam C. (West Haven CT) Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  31. Suzuki Akira (Ohme JPX) Tanaka Hideki (Koganei JPX) Murakami Gen (Machida JPX), Semiconductor device and method of manufacturing thereof.
  32. Butt Sheldon H. (Godfrey IL), Semiconductor packages.
  33. Butt Sheldon H. (Godfrey IL), Tape packages.

이 특허를 인용한 특허 (53)

  1. Parthasarathi Arvind ; Jalota Satish ; Schlater Jeffrey ; Strauman Lynn ; Braden Jeffrey S., Aluminum alloys for electronic components.
  2. Mahulikar Deepak (Madison CT) Sagiv Efraim (Meriden CT) Parthasarathi Arvind (North Branford CT) Jalota Satish (Wallingford CT) Brock Andrew J. (Cheshire CT) Holmes Michael A. (Ripon CA) Schlater Jef, Anodized aluminum substrate having increased breakdown voltage.
  3. Patterson, Janet, Apparatus for shielding integrated circuit devices.
  4. Hoffman Paul R., Ball grid array electronic package standoff design.
  5. Buchwalter, Stephen Leslie; Dang, Hung Manh; Gaynes, Michael A.; Papathomas, Konstantinos I., Cap attach surface modification for improved adhesion.
  6. Buchwalter,Stephen Leslie; Dang,Hung Manh; Gaynes,Michael A.; Papathomas,Konstantinos I., Cap attach surface modification for improved adhesion.
  7. Suzuki, Toshio; Kanayama, Masami; Hattori, Akiyoshi; Kitou, Masanori, Ceramic package with brazing material near seal member.
  8. Suzuki, Toshio; Kanayama, Masami; Hattori, Akiyoshi; Kitou, Masanori, Ceramic package with brazing material near seal member.
  9. Hoffman Paul R. (Modesto CA) Mahulikar Deepak (Madison CT) Brathwaite George A. (Hayward CA) Solomon Dawit (Manteca CA) Parthasarathi Arvind (North Branford CT), Components for housing an integrated circuit device.
  10. Seki, Kazumitsu; Miyahara, Yoshihito; Kure, Muneaki, Conductor substrate, semiconductor device and production method thereof.
  11. Seki,Kazumitsu; Miyahara,Yoshihito; Kure,Muneaki, Conductor substrate, semiconductor device and production method thereof.
  12. Islam,Shafidul; San Antonio,Romarico Santos; Subagio,Anang, Die pad for semiconductor packages and methods of making and using same.
  13. Hoffman Paul R. ; Popplewell James M. ; Braden Jeffrey S., Edge connectable metal package.
  14. Johnson, Gary, Electronic component and method of manufacturing same.
  15. Kumatani, Kazuhiko; Takano, Yoshihisa; Nakamura, Naotoshi; Ogasa, Mototsugu; Nakamura, Takashi; Iizuka, Minoru, Electronic component package.
  16. Featherby, Michael; DeHaven, Jennifer L., Electronic device packaging.
  17. Michael Featherby ; Jennifer L. DeHaven, Electronic device packaging.
  18. Sugiura, Ryouji; Sakurai, Masayuki; Masuda, Kenichi, Electronic device sealing electronic element therein and manufacturing method thereof, and printed wiring board suitable for such electronic device.
  19. Parthasarathi Arvind, Enhanced wire-bondable leadframe.
  20. Woehl, Robert; Barkhouse, David Aaron Randolph; Loscutoff, Paul, Etching techniques for semiconductor devices.
  21. Zimmerman,Michael, Flange for integrated circuit package.
  22. Cruz, Victor Hugo; Courtney, David Francis, Glass/ceramics replacement of epoxy for high temperature hermetically sealed non-axial electronic packages.
  23. Cheskis Harvey (North Haven CT) Mahulikar Deepak (Madison CT), Graphite composites for electronic packaging.
  24. Yamamoto, Masaharu; Hira, Junji, Hermetic sealing cap.
  25. Mahulikar Deepak (Meriden CT) Crane Jacob (Woodbridge CT) Braden Jeffrey S. (Milpitas CA), Kit for the assembly of a metal electronic package.
  26. Takagi, Saeko, Lead frame and semiconductor device.
  27. Mahulikar Deepak (Madison CT) Parthasarathi Arvind (North Branford CT), Leadframe having exposed, solderable outer lead ends.
  28. Stitt ; II R. Mark ; Hobson Larry D., Low temperature coefficient leadframe.
  29. Yamanaka Hideo,JPX, Manufacturing method for semiconductor unit.
  30. Yurino, Takahiro, Manufacturing method of a lead frame.
  31. Yurino, Takahiro, Manufacturing method thereof and a semiconductor device.
  32. Liu, Jwei Wien; O'Connor, John P., Masking layer in substrate cavity.
  33. Liu,Jwei Wien; O'Connor,John P., Masking layer in substrate cavity.
  34. Robinson Peter W. ; Mahulikar Deepak ; Hoffman Paul R., Metal ball grid electronic package having improved solder joint.
  35. Mahulikar Deepak (Meriden CT) Braden Jeffrey S. (Milpitas CA) Noe Stephen P. (Stratford CT), Metal electronic package having improved resistance to electromagnetic interference.
  36. Featherby Michael ; Strobel David J. ; Layton Phillip J. ; Li Edward, Method for making a shielding composition.
  37. David J. Collins ; Craig E. Core ; Lawrence E. Felton ; Jing Luo, Method of forming a cover cap for semiconductor wafer devices.
  38. Labunov Vladimir A.,BYX ; Sokol Vitaly A.,BYX ; Parkun Vladimir M.,BYX ; Vorob'yova Alla I.,BYX, Method of making multilevel interconnections of electronic parts.
  39. Michael Featherby ; David J. Strobel ; Phillip J. Layton ; Edward Li, Methods and compositions for ionizing radiation shielding.
  40. Mahulikar Deepak (Madison CT) Tyler Derek E. (Cheshire CT) Braden Jeffrey S. (Livermore CA) Popplewell James M. (Guilford CT), Molded plastic semiconductor package including heat spreader.
  41. Braden Jeffrey S. (Milpitas CA), Multi-layer lead frames for integrated circuit packages.
  42. Seki,Kazumitsu; Yoshie,Takashi; Sato,Harunobu; Miyahara,Yoshihito, Packaging component and semiconductor package.
  43. Mathew Ranjan J., Protective coating combination for lead frames.
  44. Applebaum,Edward, Radiation shielded semiconductor package.
  45. Strobel, David J.; Czajkowski, David R., Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages.
  46. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.
  47. Czjakowski David R. ; Eggleston Neil ; Patterson Janet S., Radiation shielding of three dimensional multi-chip modules.
  48. Czjakowski, David R.; Eggleston, Neil; Patterson, Janet S., Radiation shielding of three dimensional multi-chip modules.
  49. Czjakowski, David R.; Eggleston, Neil; Patterson, Janet S., Radiation shielding of three dimensional multi-chip modules.
  50. Kusukawa, Junpei; Takeuchi, Ryozo; Ishii, Toshiaki; Suzuki, Hiromichi; Ito, Fujio; Nishita, Takafumi; Kameoka, Akihiko; Yamada, Masaru, Semiconductor device.
  51. Parthasarathi Arvind ; Mahulikar Deepak, Semiconductor package with molded plastic body.
  52. Dieter Ferling DE; Anca Gutu-Nelle DE, Submount, electronic assembly and process for producing the same.
  53. Mahulikar Deepak (Meriden CT) Crane Jacob (Woodbridge CT) Khan Abid A. (Godfrey IL), Thermal performance package for integrated circuit chip.

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