초록 ▼

A main memory and cache suitable for scalar processing are used in connection with a vector processor by issuing prefetch requests in response to the recognition of a vector load instruction. A respective prefetch request is issued for each block containing an element of the vector to be loaded from

A main memory and cache suitable for scalar processing are used in connection with a vector processor by issuing prefetch requests in response to the recognition of a vector load instruction. A respective prefetch request is issued for each block containing an element of the vector to be loaded from memory. In response to a prefetch request, the cache is checked for a “miss”and if the cache does not include the required block, a refill request is sent to the main memory. The main memory is configured into a plurality of banks and has a capability of processing multiple references. Therefore the different banks can be referenced simultaneously to prefetch multiple blocks of vector data. Preferably a cache bypass is provided to transmit data directly to the vector processor as the data from the main memory are being stored in the cache. In a preferred embodiment, a vector processor is added to a digital computing system including a scalar processor, a virtual address translation buffer, a main memory and a cache. The scalar processor includes a microcode interpreter which sends a vector load command to the vector processing unit and which also generates vector prefetch requests. The addresses for the data blocks to be prefetched are computed based upon the vector address, the length of the vector and the “stride”or spacing between the addresses of the elements of the vector.

대표청구항 ▼

A method of operating a digital computer, said digital computer including a vector processor, a main memory, and a cache; said main memory including means for storing data elements at respective addresses; said cache including cache memory means for storing selected predefined blocks of said data el

A method of operating a digital computer, said digital computer including a vector processor, a main memory, and a cache; said main memory including means for storing data elements at respective addresses; said cache including cache memory means for storing selected predefined blocks of said data elements, means for receiving requests to reference a specified block of said data, means for checking whether data for the specified block is stored in the cache memory means, and means operative when data for the specified block is not so stored for reading the specified block of data from said main memory and storing the block of data in the cache memory means; said method comprising the steps of: receiving an instruction to obtain a specified vector of said data elements and load said vector into said vector processor, determining the blocks of data which include at least one data element of said vector, and transmitting requests to reference the blocks of data which are determined to include at least one data element of said vector.