초록 ▼

An FSK shift keying device includes a detector for detecting a transmission frame consisting of a preamble, data, and a postamble, a leading edge detector for detecting a leading edge of a voltage signal detected by the detector, a microprocessor for receiving a detection signal output from the lead

An FSK shift keying device includes a detector for detecting a transmission frame consisting of a preamble, data, and a postamble, a leading edge detector for detecting a leading edge of a voltage signal detected by the detector, a microprocessor for receiving a detection signal output from the leading edge detector as an interrupt signal, and resetting and restarting a timer, the timer for counting a time lapse in accordance with a clock signal from a clock generator, a sample and hold circuit for holding the voltage signal output from the detector when the time lapse counted by the timer reaches a duration of the preamble, a reference voltage generator for generating a reference voltage signal having an amplitude value which is ½an amplitude value of the voltage signal from the detector, and a comparator for comparing the reference voltage signal with the voltage signal from the sample and hold circuit.

대표청구항 ▼

A frequency shift keying (FSK) demodulating device in a transmission system for formatting digital data into a transmission frame including at least a preamble to transmit the data as a frequency shift keying signal, comprising: detecting means for detecting the input frequency shift keying signal (

A frequency shift keying (FSK) demodulating device in a transmission system for formatting digital data into a transmission frame including at least a preamble to transmit the data as a frequency shift keying signal, comprising: detecting means for detecting the input frequency shift keying signal (FSK signal) to convert the detected signal into a voltage signal corresponding to each of carrier frequency values; and discriminating means coupled to said detecting means for discriminating the voltage signal output from said detecting means to an original digital data signal representing said transmission frame, including: sampling and holding means coupled to said detecting means for holding a signal value of the voltage signal in response to a hold command signal; timer means coupled to said detecting means for counting a time lapse from a given change to a next change in a voltage increase direction; sample and hold controlling means coupled to said detecting means and said sampling and holding means, for supplying the hold command signal to said sampling and holding means when the time lapse counted by said timer means reaches a predetermined time interval determined in correspondence with a time lapse of significant level of the preamble in said transmission frame; reference voltage generating means coupled to said sampling and holding means, for generating a reference voltage which is a fraction of a predetermined value of an amplitude value of the voltage signal, and generating a difference voltage between the reference voltage and a voltage held by and output from said sampling and holding means as a comparison reference voltage signal; and comparing means coupled to said detecting means and said reference voltage generating means, for comparing the input voltage from said detecting means with the comparison reference voltage value output from said reference voltage generating means to detect the level of the voltage signal input from said detecting means.