초록 ▼

A fault tolerant smart card is provided having primary functional units including a standard ISO interface, a first microcontroller, a clock, and main memory. Secondary functional units including a secondary microcontroller, secondary memory with bit checking capability and an alternate battery powe

A fault tolerant smart card is provided having primary functional units including a standard ISO interface, a first microcontroller, a clock, and main memory. Secondary functional units including a secondary microcontroller, secondary memory with bit checking capability and an alternate battery power source are also provided. A microcontroller error detector is connected to both microcontrollers. Should a discrepancy between microcontrollers occur known test patterns are run on the second microcontroller to determine which microcontroller is faulty. A private access port provides alternate access to information stored in the fault tolerant smart card. Registers for funds remaining, error condition and access account are also provided.

대표청구항 ▼

A fault tolerant smart card comprising: a standard input-output interface; clock means for providing a time reference during smart card operations; main memory means for storing program and data information; first microcontroller means connected to said interface, said clock means and said main memo

A fault tolerant smart card comprising: a standard input-output interface; clock means for providing a time reference during smart card operations; main memory means for storing program and data information; first microcontroller means connected to said interface, said clock means and said main memory means for performing normal smart card functions; secondary microcontroller means connected to said first microcontroller means, said clock means, said main memory means and to secondary memory means for performing normal smart card functions in synchronization with said first microcontroller means; microcontroller error detection means connected to said first microcontroller means and said secondary microcontroller means for detecting a failure of either of said first or secondary microcontrollers; and primary power supply means connected to said first microcontroller means.