초록 ▼

A remote control apparatus has a transmitter which is capable of being switched between a normal position and a changing position, and a receiver which is capable of being switched between a normal mode and a changing mode. The remote control apparatus utilizes a first memory device in the transmitt

A remote control apparatus has a transmitter which is capable of being switched between a normal position and a changing position, and a receiver which is capable of being switched between a normal mode and a changing mode. The remote control apparatus utilizes a first memory device in the transmitter to store an address code; an address code generator in the transmitter to generate a new address code and to store it in the first memory device when the transmitter is switched to the changing position; and a transmitting device in the transmitter to transmit the address code stored in the first memory device. The remote control apparatus also utilizes a receiving device in the receiver to receive the transmitted address code; a second memory device in the receiver to store the received address code therein when the receiver is switched to the changing mode; a comparator in the receiver to compare the received address code with the address code stored in the second memory device when the receiver is switched to the normal mode; and an output gate in the receiver to be activated by the comparator to output an operating signal when the address codes are the same.

대표청구항 ▼

A remote control apparatus including a transmitter which is capable of being switched between a normal position and a changing position, and a receiver which is capable of being switched between a normal mode and a changing mode, said remote control apparatus comprising: a first memory means in said

A remote control apparatus including a transmitter which is capable of being switched between a normal position and a changing position, and a receiver which is capable of being switched between a normal mode and a changing mode, said remote control apparatus comprising: a first memory means in said transmitter for storing a digital address code having a plurality of bits; generating means in said transmitter for generating a new address code and for storing the new address code in said first memory means when said transmitter is switched to the changing position, said generating means including a manual code generator for being manually controlled to generate the new address code; transmitting means in said transmitter for transmitting the address code stored in said first memory means; receiving means in said receiver for receiving the transmitted address code; a second memory means in said receiver for storing the received address code therein when said receiver is switched to the changing mode; comparing means in said receiver for comparing the received address code with the address code stored in said second memory means when said receiver is switched to the normal mode; means in said receiver for being activated by said comparing means to output an operating signal when the received address code and the address code stored in said second memory means are the same; and a third switch means in said transmitter for being manually switched between on and off positions, said manual code generator being coupled to and controlled by said third switch means to generate a logical high bit signal when said third switch means is switched to the on position for greater than a predetermined length of time, and to generate a logical low bit signal when said third switch means is switched to the on position for not greater than the predetermined length of time, said first memory means comprising means for storing the logical high and low bit signals in series.