|국가/구분||United States(US) Patent 등록|
|미국특허분류(USC)||365/23005 ; 365/18904 ; 365/23002|
|발명자 / 주소|
|출원인 / 주소|
|인용정보||피인용 횟수 : 16 인용 특허 : 3|
A dual port read/write register file memory includes means for performing a read/modify write cycle of operation within a single system cycle of operation. The register file memory is constructed from one to more (RAM) addressable multibit storage arrays organized to form a dual read port, single write port RAM. Additionally, the register file includes a plurality of clocked input registers arranged in pairs for storing command, address and data signals for two write ports. The different pairs of registers are connected as inputs to a first set of multip...
A dual port read/write memory having a single write input sort comprising: a random access memory (RAM) array having a plurality of addressable storage locations, said RAM having said single write port including a set of write data, address and write enable input terminals; clocked input register means for storing sets of write data, address and command information associated with a pair of ports; multiplexer selector means connected to said register means for receiving said sets of information and said multiplexer selector means being connected to apply...