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Packaging system for stacking integrated circuits

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/12
  • H01L-023/04
  • H01L-023/14
출원번호 US-0182098 (1988-04-15)
발명자 / 주소
  • Carlson Randolph S. (Carson City NV) Chase Charles P. (Carson City NV)
출원인 / 주소
  • XOC Devices, Inc. (Carson City NV 02)
인용정보 피인용 횟수 : 94  인용 특허 : 25

초록

Integrated circuit dies are mounted to the interconnection leads on frames of tape automatic bonding (TAB) film. Thereafter, each frame of the TAB film with the attached integrated circuit die is affixed to an electrically insulating, thermally conductive plate to form a sandwich structure. A number

대표청구항

An apparatus for interconnecting a plurality of electrical circuits in a stack having a top surface and a bottom surface, said stack comprising: a plurality of sandwiched structures, each sandwiched structure comprising: an electrical circuit having a plurality of electrical interconnections on at l

이 특허에 인용된 특허 (25)

  1. Anthony Thomas R. (Schenectady NY), Alignment-enhancing feed-through conductors for stackable silicon-on-sapphire wafers.
  2. Wanesky William R. (Wescosville PA), Apparatus for transferring an oriented array of articles.
  3. Frampton Thomas J. (Poway CA), Ceramic package system using low temperature sealing glasses.
  4. Sutrina Thomas A. (Rockford IL), Cooled stack of electrically isolated semiconductors.
  5. Carson, John C.; Clark, Stewart A., Detector array module-structure and fabrication.
  6. Gogal John F. (Lebanon NJ), Double cavity semiconductor chip carrier.
  7. Clark James W. (San Jose CA), Film carrier for manufacturing semiconductor devices.
  8. Sugimoto Masahiro (Yokosuka JPX) Wakasugi Yasumasa (Kawasaki JPX) Harada Shigeki (Kawasaki JPX), Heatsink package for flip-chip IC.
  9. Carson John C. (Corona del Mar CA) Clark Stewart A. (Irvine CA), High-density electronic processing package-structure and fabrication.
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  12. Wulff, Richard W., Leadless chip carrier with frangible shorting bars.
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  14. Lucas, Michael R., Low stress leadless chip carrier and method of assembly.
  15. Anthony Thomas R. (Schenectady NY), Method for making alignment-enhancing feed-through conductors for stackable silicon-on-sapphire.
  16. Faith ; Jr. Thomas J. (Lawrenceville NJ) Irven Robert S. (Belle Mead NJ) Plante Sabrina K. (Arlington VA), Method for mounting a sapphire chip on a metal base and article produced thereby.
  17. Wanesky William R. (Wescosville PA), Method of placing an oriented array of devices on a releasable mounting.
  18. Shirasaki Yuzo (Tokorozawa JPX), Package for an integrated circuit having a container with support bars.
  19. Ng Kwok K. (Union NJ) Sze Simon M. (Berkeley Heights NJ), Packaging microminiature devices.
  20. Wanesky William R. (Wescosville PA), Releasable mounting and method of placing an oriented array of devices on the mounting.
  21. Sono Michio (Yamato JPX), Resin-sealed radiation shield for a semiconductor device.
  22. Anthony Thomas R. (Schenectady NY) Connery Richard J. (Liverpool NY) Hoeschele ; Jr. David F. (Boyertown PA), Silicon-on-sapphire body with conductive paths therethrough.
  23. Shibata Tadashi (Yokohama JPX), Stacked semiconductor device with sloping sides.
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  25. Lutz Phillip A. (Kokomo IN) Motz Phillip R. (Kokomo IN) Sayers Eugene H. (Kokomo IN), Vertical integrated circuit package integration.

이 특허를 인용한 특허 (94)

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