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Stacked wafer electronic package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-007/20
출원번호 US-0329991 (1989-03-29)
발명자 / 주소
  • Gates
  • Jr. Louis E. (Westlake Village CA) Finnila Charles A. (Manhattan Beach CA)
출원인 / 주소
  • Hughes Aircraft Company (Los Angeles CA 02)
인용정보 피인용 횟수 : 33  인용 특허 : 5

초록

The electronic package (10) is comprised of a plurality of support plates (12-24), each of which has a plenum therein and preferably webs extending into the plenum for fluid flow control and heat transfer. A wafer (104) is mounted in a recess (100) in the support plate (12) so that fluid in the plen

대표청구항

An electronic package comprising: at least first and second support plates and a bottom support plate, each of said support plates having a support surface thereon, a semiconductor wafer directly supported on said support surface of each of said support plates, each of said support plates having a p

이 특허에 인용된 특허 (5)

  1. Tajima Tsuneaki (Tokyo JPX) Matsuo Yohichi (Tokyo JPX), Air cooling equipment for electronic systems.
  2. Kikuchi Shunichi (Yokohama JPX) Matsunaga Haruyuki (Atsugi JPX) Katsumi Hideo (Sagamihara JPX) Katsuyama Koji (Yokohama JPX), Cooling system for electronic circuit components.
  3. Morrison Robert A. (Granada Hills CA) Frink Attila (Northridge CA), Electronic packaging module utilizing phase-change conductive cooling.
  4. Trommer William C. (Rockford IL), Rotating rectifier assembly.
  5. Parks Howard L. (Los Gatos CA), Three-dimensional microelectronic package for semiconductor chips.

이 특허를 인용한 특허 (33)

  1. Pinjala, Damaruganath; Kripesh, Vaidyanathan; Zhang, Hengyun; Iyer, Mahadevan K; Nagarajan, Ranganathan, Apparatus and method for fluid-based cooling of heat-generating devices.
  2. Goss Steven R. (Tucson AZ) Taggart Owen H. (Tucson AZ), Circuit card mounting system having a cylindrical housing and circular card locks.
  3. Dede, Ercan Mehmet; Liu, Yan, Cold plate assemblies and power electronics modules.
  4. Grosskopf, Andrew P.; Franklin, Mark J., Connector and spring assembly for a generator.
  5. Beilin Solomon I. ; Chou William T. ; Kudzuma David ; Lee Michael G. ; Peters Michael G. ; Roman James J. ; Swamy Som S. ; Wang Wen-chou Vincent ; Moresco Larry L. ; Murase Teruo, Controlled impedance interposer substrate and method of making.
  6. Beilin Solomon I. ; Chou William T. ; Kudzuma David ; Lee Michael G. ; Peters Michael G. ; Roman James J. ; Swamy Som S. ; Wang Wen-chou Vincent ; Moresco Larry L. ; Murase Teruo, Controlled impedence interposer substrate.
  7. Herbert Edward, Fan with heat sink using stamped heat sink fins.
  8. Olesen, Klaus Kristen, Flow distribution module and a stack of flow distribution modules.
  9. Donegan Kevin J. ; Colello Gary M. ; Millas Gary P. ; Salter ; II Richard T., Heat exchanger.
  10. James Kevin Azotea, Heat exchanging chassis.
  11. Azotea James Kevin, Heat exchanging chassis and method.
  12. Kimbara, Masahiko; Toh, Keiji; Kubo, Hidehito; Tanaka, Katsufumi; Otoshi, Kota; Kono, Eiji; Wakabayashi, Nobuhiro; Nakagawa, Shintaro; Furukawa, Yuichi; Yamauchi, Shinobu, Heat sink for power module.
  13. Joshi, Shailesh N., Jet impingement cooling apparatuses having enhanced heat transfer assemblies.
  14. Lai, Cheng Tien; Zhou, Zhi Yong, Liquid-cooling device.
  15. Darwish Rashwan B. ; Huynh Trung, Memory bar and related circuits and methods.
  16. Darwish Rashwan B. ; Huynh Trung, Memory bar and related circuits and methods.
  17. Vindasius Alfons ; Sautter Kenneth M., Method for forming vertical interconnect process for silicon segments with dielectric isolation.
  18. Vindasius Alfons ; Sautter Kenneth M., Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform.
  19. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Methods of forming stacked semiconductor devices with a leadframe and associated assemblies.
  20. Dede, Ercan Mehmet, Power electronics modules and power electronics module assemblies.
  21. Mamitsu, Kuniaki; Teshima, Takanori, Semiconductor device.
  22. David V. Pedersen ; Michael G. Finley ; Kenneth M. Sautter, Silicon segment programming apparatus and three terminal fuse configuration.
  23. Pedersen David V. ; Finley Michael G. ; Sautter Kenneth M., Silicon segment programming method.
  24. Pedersen David V. (Scotts Valley CA) Finley Michael G. (Cambria CA) Sautter Kenneth M. (Sunnyvale CA), Silicon segment programming method and apparatus.
  25. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Stacked packaged integrated circuit devices.
  26. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Stacked packaged integrated circuit devices, and methods of making same.
  27. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Stacked packaged integrated circuit devices, and methods of making same.
  28. Parks Howard L. (Los Gatos CA) Piatt Terence D. (Pacifica CA), Three-dimensional package for semiconductor devices.
  29. Rau, Matthew Joseph; Dede, Ercan Mehmet; Joshi, Shailesh N.; Garimella, Suresh V., Vehicles, power electronics modules and cooling apparatuses with single-phase and two-phase surface enhancement features.
  30. Pedersen David V. ; Finley Michael G. ; Sautter Kenneth M., Vertical interconnect process for silicon segments.
  31. Pedersen David V. ; Finley Michael G. ; Sautter Kenneth M., Vertical interconnect process for silicon segments.
  32. Vindasius Alfons ; Sautter Kenneth M., Vertical interconnect process for silicon segments with dielectric isolation.
  33. Vindasius Alfons ; Sautter Kenneth M., Vertical interconnect process for silicon segments with thermally conductive epoxy preform.
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