초록 ▼

The coordinate detecting device according to this invention processes a plurality of detected adjoining input values scanned from an optical inputting grid and creates a single average value from the plurality which single value it provides to a host computer. It also evaluates data received from sa

The coordinate detecting device according to this invention processes a plurality of detected adjoining input values scanned from an optical inputting grid and creates a single average value from the plurality which single value it provides to a host computer. It also evaluates data received from said optical inputting grid and restarts the scanning of the optical inputting grid independent of processing through a host computer when no input value is detected. It also receives and stores each input value received from said optical inputting grid, but does not provide an output to a host computer as long as an input value is detected, when an input value is no longer detected the last input value stored is outputted to a host computer. It also receives and stores each input values received from said optical inputting grid and compares each new value with the previous value which has been stored and when a difference between the new and the previous signals is detected the previous value stored is outputted to a host computer. It also receives and evaluates each input value received from said optical inputting grid and compares each new value with one or more valid value ranges previously stored and when an input value is in the valid range a range identifying signal corresponding to the range in which the valid signal is detected is outputted to a host computer, but when the evaluation shows that the value is not in a valid value range scanning is restarted and no signal is output to the host computer. Each of these functions relieves the amount of processing that the host computer is required to perform and thereby frees it for other tasks.

대표청구항 ▼

A coordinate detecting device responsive to coordinate input operations for providing to a host computer coordinate values comprising: a counting circuit for providing at an output a series of counter values, having at least one reset signal input terminal, which, when when receiving a reset signal

A coordinate detecting device responsive to coordinate input operations for providing to a host computer coordinate values comprising: a counting circuit for providing at an output a series of counter values, having at least one reset signal input terminal, which, when when receiving a reset signal resets the counter to its beginning value and restarts said counting circuit; a coordinate detecting section having a counter receiving input for receiving counter values from said counting circuit and for effecting scanning of a plurality of sensing elements driven one after another depending on the counter value outputted by said counting circuit, and detecting a coordinate input operation of the basis of said counter values received from said counting circuit, including a means for providing at an output a detection signal indicating the detection of a coordinate input operation; means coupling the output of said counting circuit to said counter receiving input of said coordinate detecting section; detection presence/absence judging means having an input for receiving detection signals from said coordinate detecting section and including means for detecting the receipt of a detection signal and providing at an output terminal a detection presence/absence signal which indicates that a coordinate input operation has been performed; means coupling the output of said coordinate detecting section to said detection signal receiving input of said detection presence/absence judging means; scan termination judging means having an input coupled to the output of said counting circuit for receiving counter values from said counting circuit and including means for judging the termination of a scan on the basis of said counter values from said counting circuit, and means for providing at an output terminal a scan termination signal when a scan is judged to be terminated; detection presence/absence signal processing means, having a first input terminal coupled to said output terminal of said detection presence/absence judging means for receiving detection presence/absence signals, said detection presence/absence signal processing means, including circuit means for providing at a first output terminal a detection sensing signal indicating receipt of at least one detection presence/absence signal, said detection presence/absence signal processing means further including circuit means for providing at a second output terminal a series sensing signal in response to receipt of a plurality of uninterrupted detection presence/absence signals from said detection presence/absence judging means, said detection presence/absence signal processing means having a second input coupled to said output of said scan termination judging means for receiving scan termination signals, said detection presence/absence processing means further including circuit means for resetting said detection presence/absence processing means at the end of said scan; coordinate value obtaining means having an input coupled to the output of said counting circuit for selectively receiving counter values from said counting circuit, said coordinate value obtaining means having an input coupled to said first output of said detection presence/absence processing means for receiving said detection sensing signal, said coordinate value obtaining means including circuit means responsive to receipt of said detection sensing signal to couple the counter value to said coordinate value obtaining means and including means for processing counter value received from said counting circuit to arrive at a signal representative of a coordinate value and generating signals representative of coordinate values, said coordinate value obtaining means further including means for selectively providing at an output terminal, upon the receipt of a coordinate value outputting control signal at an outputting control signal terminal, a signal representative of a coordinate value; coordinate memory means having an input terminal coupled to the output terminal of said coordinate value obtaining means for receiving signals representative of coordinate values from said coordinate value obtaining means, and storing only the most recently received signal, said coordinate memory means providing at an output terminal, the signal representative of the coordinate value stored in said coordinate memory means; detection signal memory means for receiving and storing a detection status signal indicating that a coordinate input operation has occurred, said detection signal memory means having a detection status signal receiving input terminal, and providing at an output terminal a detection signal status signal which indicates whether a coordinate input operation has occurred since the time a previous coordinate value was provided from said coordinate detecting device to said host computer; comparing means including a preceding coordinate value memory means for storing a signal representative of the last coordinate value sent by said coordinate detecting device to said host computer, said comparing means having a first input terminal for receiving a signal representative of the last coordinate value sent by said coordinate detecting device to said host computer and having a second input terminal for receiving a signal representative of a coordinate value from said coordinate value obtaining means output terminal representing an indication that no detection signal has been received by said detection presence/absence judging means, said signal is provided to said preceding coordinate value memory means when a host computer reset signal is provided to said coordinate detecting device, said preceding coordinate value memory means further having a first preceding coordinate value means input terminal coupled to said coordinate value obtaining means output terminal, said preceding coordinate value memory means having a second preceding coordinate value means input terminal coupled to said coordinate detecting device output terminal which provides an output to said host computer, said comparing means having an output comparator which receives a signal representative of the signal stored in the preceding coordinate value memory means at a first input terminal, said comparing means output comparator having a second input terminal coupled to said coordinate memory means output terminal for receiving the signal representative of the coordinate value stored in said coordinate memory means, and said output comparator compares said signal representative of a coordinate value stored in said preceding coordinate value memory means with the signal representative of a coordinate value stored in said coordinate memory means and provides at an output terminal of said output comparator a signal for controlling the output of the last signal representative of a coordinate value last stored in said coordinate memory means to said host computer when said comparing means output comparator determines that said signal representative of a coordinate value stored in said coordinate memory means is different than said signal representative of a coordinate value stored in said preceding coordinate value memory means and when a comparing means controlling input signal is received at an input terminal of said output comparator causing said comparing means output comparator signal to be generated to permit said signal representative of a coordinate value stored in said coordinate memory means to be outputted to said host computer; operation controlling means, including status generating circuitry for generating a detection status signal in response to receipt of a series sensing signal, said operation controlling means having an output terminal coupled to said counting circuit reset input terminal, an input terminal coupled to said scan termination judging means output terminal, having an input coupled to said detection signal series sensing signal output terminal, an output terminal for providing said detection status signal, an input terminal coupled to said output terminal of said detection signal memory means, an output terminal coupled to said coordinate value outputting control signal terminal, and an output terminal at which a coordinate memory means output controlling signal is provided, said operation controlling means further including control circuitry for providing control signals upon receipt of each said scan termination signal, said control circuitry providing a reset signal to said counting circuit if no series sensing signal was received and no coordinate input operation has occurred since the time a previous coordinate value was provided from said coordinate detecting device to said host computer, said circuitry further providing a reset signal to said counting circuit, providing a coordinate value outputting control signal, providing a detection status signal, and providing a comparing means controlling input signal, if a series sensing signal was received, and said control circuitry providing a coordinate memory means output controlling signal and providing an output signal to cause said coordinate value stored in said coordinate memory means to be outputted, if no series sensing signal was received and at least one coordinate input operation had occurred since the time a previous coordinate value was provided from said coordinate detecting device to said host computer; and outputting means, including at least one control terminal, for selectively coupling said coordinate memory means output terminal to said host computer, and providing an input signal to said host computer in response to receipt of said coordinate memory means output controlling output signal from said output controlling means, at said at least one control terminals, and further providing an input signal to said host computer in response to receipt of said comparing means output comparator signal from said comparing means output comparator at said at least one control terminal, said at least one control terminal being coupled to said said coordinate memory means output controlling output terminal of said operation controlling means and said output comparator signal terminal of said comparing means output comparator.