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Metal packages having improved thermal dissipation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
  • H01L-023/12
출원번호 US-0091470 (1987-08-31)
발명자 / 주소
  • Butt Sheldon H. (Godfrey IL) Mahulikar Deepak (Meriden CT)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 29  인용 특허 : 14

초록

A package adapted to encase an electronic component is disclosed. The package comprises a metallic lid component disposed on a metallic base component to form an enclosure adapted to receive said electronic component. A metallic leadframe is disposed between the base and lid components and is glass

대표청구항

A package adapted to encase an electronic component, comprising; a metallic base component split into first and second base layers, said first and second base layers bonded together at an interface with a layer of electrically insulating sealing material wherein said interface is non-planer and incr

이 특허에 인용된 특허 (14)

  1. Frampton Thomas J. (Poway CA), Ceramic package system using low temperature sealing glasses.
  2. Matsushita Yasuo (Hitachi JPX) Nakamura Kousuke (Hitachi JPX) Ura Mitsuru (Hitachi JPX), Ceramic packaged semiconductor device.
  3. Butt Sheldon H. (Godfrey IL), Composites of glass-ceramic to metal seals and method of making the same.
  4. Frye Robert C. (Piscataway NJ) Griffith Joseph E. (New Providence NJ) Wong Yiu H. (Berkeley Heights NJ), Dielectrically isolated semiconductor devices.
  5. Dubois Jerry M. (Mesa AZ) Spanjer Keith G. (Scottsdale AZ), Electrically isolated semiconductor power device.
  6. Chu Richard C. (Poughkeepsie NY) Gupta Omkarnath R. (Poughkeepsie NY) Hwang Un-Pah (Poughkeepsie NY) Simons Robert E. (Poughkeepsie NY), Gas encapsulated cooling module.
  7. Davis Earl K. (Tempe AZ) Drye James E. (Mesa AZ) Reed David J. (Mesa AZ), Glass bonding method.
  8. Calabro Anthony D. (8738 West Chester Pike Upper Darby PA 19082) Marchetti Richard J. (Norristown PA), Heat dissipator for integrated circuit chips.
  9. Johnson, Philip A.; McCarthy, Alfred F., Heat sinks for integrated circuit modules.
  10. Iwatani Shiro (Himeji JPX), Hybrid thick film integrated circuit heat dissipating and grounding assembly.
  11. Kiley Richard F. (Stoneham MA) Larson ; Jr. Ralph I. (North Reading MA), Method for mounting, electrically isolating and maintaining constant pressure on a semiconductor element.
  12. Butt Sheldon H. (Godfrey IL), Method of assembling a chip carrier.
  13. Otsuka Kanji (Higashiyamato JPX) Sahara Kunizou (Kodaira JPX) Sekibata Masao (Kunitachi JPX) Mitsusada Kazumichi (Kodaira JPX) Ogiue Katsumi (Tokyo JPX), Packaged semiconductor device structure including getter material for decreasing gas from a protective organic covering.
  14. Butt Sheldon H. (Godfrey IL), Semiconductor packages.

이 특허를 인용한 특허 (29)

  1. Hoffman Paul R. (Modesto CA) Mahulikar Deepak (Madison CT) Brathwaite George A. (Hayward CA) Solomon Dawit (Manteca CA) Parthasarathi Arvind (North Branford CT), Components for housing an integrated circuit device.
  2. Ninomiya Junji,JPX ; Hideno Akira,JPX ; Okada Takahiro,JPX, Composite substrate for heat-generating semiconductor device and semiconductor apparatus using the same.
  3. Kawamura, Yukihiro, Connection structure of electronic component and terminal metal fittings.
  4. Torkington,Richard S.; Filreis,Jon; Buer,Kenneth V., Direct contact semiconductor cooling.
  5. Noquil, Jonathan A., Dual side cooling integrated power device module and methods of manufacture.
  6. Noquil, Jonathan A., Dual side cooling integrated power device module and methods of manufacture.
  7. Noquil, Jonathan A.; Madrid, Ruben, Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture.
  8. Hoffman Paul R. ; Popplewell James M. ; Braden Jeffrey S., Edge connectable metal package.
  9. Mahulikar Deepak (Madison CT), Electronic package with improved electrical performance.
  10. Moden Walter L. ; Jacobson John O., Encapsulant dam standoff for shell-enclosed die assemblies.
  11. Smith Carl R., Graphite aluminum metal matrix composite microelectronic package.
  12. Bosco,Bruce A.; Emrick,Rudy M.; Franson,Steven J.; Holmes,John E.; Rockwell,Stephen K., Hermetic cavity package.
  13. Combs Edward G. (Foster City CA), High power dissipation plastic encapsulated package for integrated circuit die.
  14. Chang,Chih Chin; Huang,Teng Huei; Lee,Chien Lung, Light module.
  15. Cruickshank, Dave; Ly, Tri M.; Zheng, Jingmin, Magnetic-dielectric assemblies and methods of fabrication.
  16. Boyle John J. ; Robbins William L., Method for attaching a die to a carrier utilizing an electrically nonconductive layer.
  17. Otsuki Tetsuya,JPX, Method of making a multiple heat sink resin sealing type semiconductor device.
  18. Fukuyama Jun (Fukuoka JPX), Method of manufacturing a semiconductor device for power supply use.
  19. Katayama Shigeru,JPX ; Tominaga Kaoru,JPX ; Yoshitake Junichi,JPX, Method of manufacturing a semiconductor device with an airtight space formed internally within a hollow package.
  20. Dudderar Thomas Dixon ; Han Byung Joon,KRX ; Raju Venkataram Reddy ; Shevchuk George John, Method of packaging fragile devices with a gel medium confined by a rim member.
  21. Matsuo Shogo,JPX, Package for housing a semiconductor element.
  22. Addington, Cary G.; Whittington, Shell Elaine; Mardilovich, Peter; Wren, William, Seal of fluid port.
  23. Refai-Ahmed, Gamal; Su, Michael Z.; Black, Bryan, Semiconductor chip device with liquid thermal interface material.
  24. Akihiro Fukatsu JP; Kan Kinouchi JP; Mitsuhiro Saito JP; Yoshiharu Harada JP, Semiconductor device having heat radiating member.
  25. Fukamura Hajime,JPX ; Izumi Akio,JPX, Semiconductor optical sensing device package.
  26. Parthasarathi Arvind ; Mahulikar Deepak, Semiconductor package with molded plastic body.
  27. You Joong Ha,KRX, Semiconductor package with transparent window and fabrication method thereof.
  28. Fukushima, Daisuke, Surface mounting package.
  29. Neogi,Sudipto; Sur,Biswajit; Tan,Boon Seng; Rumer,Chris, Windowed package for electronic circuitry.
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