초록 ▼

An adaptive processing system for real-time signal processing of one or more input signals in parallel-pipeline fashion is provided. According to the invention, the adaptive processing system includes a random access processor having an array of processing elements each being individually configurab

An adaptive processing system for real-time signal processing of one or more input signals in parallel-pipeline fashion is provided. According to the invention, the adaptive processing system includes a random access processor having an array of processing elements each being individually configurable. A man-machine interface receives instructions defining how an input signal is to be processed by the random access processor. A configuration controller responsive to the interface is used to generate configuration data defining a configuration of the random access processor, and data flow between contiguous processing elements thereof, for enabling processing of the input signals according to the insructions. The random access processor is configurable into one or more individually addressable processing arrays which may perform linear or nonlinear operations on an input signal.

대표청구항 ▼

A random access processor for real-time signal processing of an input signal, comprising an array having at least first and second contiguous processing elements, each of said processing elements including: first, second and third programmable switches, said first programmable switch of said second

A random access processor for real-time signal processing of an input signal, comprising an array having at least first and second contiguous processing elements, each of said processing elements including: first, second and third programmable switches, said first programmable switch of said second processing element slaved to said third programmable switch of said first processing element, a multiplier having a first input connected to an output of said first programmable switch, a second input and an output; a latch having an input connected to an output of said second programmable switch and an output connected to said second input of said multiplier; an adder having a first input connected to said output of said multiplier, a second input connected to an output of said second programmable switch, and an output connected to an input of said third programmable switch; and a programmable delay element having an input connected to an output of said first programmable switch, a control terminal for receiving data for setting an amount of delay provided by said programmable delay element, and an output.