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High performance plastic encapsulated package for integrated circuit die 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/28
  • H01L-023/02
출원번호 US-0402940 (1989-09-05)
발명자 / 주소
  • Chu George D. (Newark CA)
출원인 / 주소
  • Advanced Micro Devices, Inc. (Sunnyvale CA 02)
인용정보 피인용 횟수 : 49  인용 특허 : 9

초록

A high performance plastic-encapsulated integrated circuit package is disclosed having both improved heat dissipation and low ground noise comprising one or more separate ground and/or power planes below the signal lines which includes an electrically conductive heat sink member on which an integrat

대표청구항

A high performance plastic-encapsulated integrated circuit package characterized by both improved heat dissipation and low ground noise comprising one or more separate planes selected from the class consisting of a ground plane, a power plane, and combinations of same disposed in a parallel plane; a

이 특허에 인용된 특허 (9)

  1. Butt Sheldon H. (Godfrey IL), Casing for an electrical component having improved strength and heat transfer characteristics.
  2. Gogal John F. (Lebanon NJ), Double cavity semiconductor chip carrier.
  3. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  4. Hayward James (Mountain View CA) Brown Candice H. (San Jose CA), Integrated circuit lead frame assembly containing voltage bussing and distribution to an integrated circuit die using ta.
  5. Daniels Wilbert E. (West Buckston ME) Fraser Dana J. (South Portland ME), Low impedance package for integrated circuit die.
  6. Desai Kamalesh S. (Wappingers Falls NY) Eggerding Carl L. (Wappingers Falls NY) Ferrante John A. (Sherman CT) Ricci Raymond (Wappingers Falls NY) Urfer Ernest N. (Hopewell Junction NY), Process and structure for minimizing delamination in the fabrication of multi-layer ceramic substrate.
  7. Phy, William S., Radiation protection for integrated circuits utilizing tape automated bonding.
  8. Miyauchi Akira (Kawasaki JPX) Nishimoto Hiroshi (Tokyo JPX) Okiyama Tadashi (Kawasaki JPX) Kitasagami Hiroo (Kawasaki JPX) Sugimoto Masahiro (Yokosuka JPX) Tamada Haruo (Yokohama JPX) Emori Shinji (U, Semiconductor device.
  9. Butt Sheldon H. (Godfrey IL), Semiconductor package.

이 특허를 인용한 특허 (49)

  1. Lao, Binneg Y.; Chen, William W., Apparatus and method for a chip assembly including a frequency extending device.
  2. Bhatt Ashwinkumar C. (Endicott NY) Duffy Thomas P. (Endicott NY) Hackett Gerry A. (Apalachin NY) McKeveny Jeffrey (Endicott NY), Apparatus for laminating and circuitizing substrates having openings therein.
  3. Anthony, Anthony A.; Anthony, William M., Arrangement for energy conditioning.
  4. Anthony, Anthony A.; Anthony, William M., Arrangement for energy conditioning.
  5. Anthony, Anthony A.; Anthony, William M., Arrangement for energy conditioning.
  6. Anthony, Anthony A.; Anthony, William M., Arrangement for energy conditioning.
  7. Lao, Binneg Y.; Chen, William W., Chip assembly with frequency extending device.
  8. Wittenberg, Michael B.; Merz, Nicholas G.; Malek, Shayan, Cooling for electronic components.
  9. Martich Mark E., Electromechanical switching device package with controlled impedance environment.
  10. Vogt,Pete D., Embedded heat spreader.
  11. Vogt,Pete D., Embedded heat spreader.
  12. Anthony, Anthony A.; Anthony, William M., Energy conditioning circuit arrangement for integrated circuit.
  13. Kim Sun Dong,KRX, Fabrication method for semiconductor package substrate and semiconductor package.
  14. Chowdhury, Ihtesham H.; Lam, Henry H.; Wright, Derek W.; Heresztyn, Amaury J., Heat transfer structure.
  15. Combs Edward G. (Foster City CA), High power dissipation plastic encapsulated package for integrated circuit die.
  16. Reignoux,Yves; Daniel,Eric, Integrated circuit device, electronic module for chip cards using said device and method for making same.
  17. Questad David Lee ; Quinn Anne Marie ; Thiel George Henry ; Trevitt Donna Jean ; Wu Tien Yue ; Zippetelli Patrick Robert, Integrated circuit package.
  18. Questad David Lee ; Quinn Anne Marie ; Thiel George Henry ; Trevitt Donna Jean ; Wu Tien Yue ; Zippetelli Patrick Robert, Integrated circuit package including a heat sink and an adhesive.
  19. Combs Edward G. ; Sheppard Robert, Integrated circuit package with bonding planes on a ceramic ring using an adhesive assembly.
  20. Kerry L. Davison ; Donald E. Hawk, Jr. ; Yehuda Smooha, Integrated circuit package with improved ESD protection for no-connect pins.
  21. Anthony, William M.; Anthony, David; Anthony, Anthony, Internally overlapped conditioners.
  22. Martich, Mark E., Inverted board mounted electromechanical device.
  23. Kalyanasundaram, Nagarajan; Heresztyn, Amaury, Liquid crystal switching barrier thermal control.
  24. Thomas P. Glenn, Long wire IC package.
  25. Glenn Thomas P., Long wire IC package fabrication method.
  26. Towle,Steven; Tang,John; Cuendet,John S.; Braunisch,Henning; Dory,Thomas S., Low cost microelectronic circuit package.
  27. Casati Paolo,ITX ; Corno Marziano,ITX ; Marchisi Giuseppe,ITX, Method for fabricating an electronic device structure with studs locating lead frame on backing plate.
  28. Anthony, William M.; Anthony, David; Anthony, Anthony, Method for making internally overlapped conditioners.
  29. Bhatt Ashwinkumar C. (Endicott NY) Duffy Thomas P. (Endicott NY) Knight Jeffrey A. (Endwell NY) Walsh James P. (Vandling PA), Method of construction for multi-tiered cavities used in laminate carriers.
  30. Katayama Shigeru,JPX ; Tominaga Kaoru,JPX ; Yoshitake Junichi,JPX, Method of manufacturing a semiconductor device with an airtight space formed internally within a hollow package.
  31. Lee Sang S. ; Chen Che-Yuan, Methods and apparatus for manufacturing encapsulated integrated circuits.
  32. Combs, Edward G., Molded plastic package with heat sink and enhanced electrical performance.
  33. Combs, Edward G., Molded plastic package with heat sink and enhanced electrical performance.
  34. Karnezos Marcos ; Chang S. C. ; Combs Edward G. ; Fahey John R., Molded plastic package with heat sink and enhanced electrical performance.
  35. Sakatani, Shigeaki; Yamaguchi, Atsushi; Matsuno, Koso; Miyakawa, Hidenori, Mounted structural body and method of manufacturing the same.
  36. Tanaka Shinji,JPX, Mounting structure for an integrated circuit.
  37. Pope, Benjamin J.; Myers, Scott A.; Chowdhury, Ihtesham H., Parallel heat spreader.
  38. Kim Sun Dong,KRX, Plate and column type semiconductor package having heat sink.
  39. Long Jon ; McCormick John, Power plane for semiconductor device.
  40. Dordi Yezdi N., Reflow ball grid array assembly.
  41. Chen, Nan-Jang, Semiconductor chip package.
  42. Chen, Nan-Jang, Semiconductor chip package.
  43. Chen, Nan-Jang, Semiconductor chip package.
  44. Chen, Nan-Jang, Semiconductor chip package including a lead frame.
  45. Liu, Sheng Tsung; Cruz, Jr., Francisco C., Semiconductor device.
  46. Sheng-Tsung Liu TW; Francisco C. Cruz, Jr. PH, Semiconductor device.
  47. Suzuki, Shinsuke, Semiconductor device and method for producing the same.
  48. Harada, Yoshihito; Nakamura, Katsunori, Semiconductor package.
  49. Kim Sun Dong,KRX, Semiconductor package substrate and semiconductor package.
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