초록 ▼

A decoder is arranged to operate as a single-bit error correction circuit (ECC) and as a multiple-bit error detection circuit (EDC). The decoder starts and remains in the ECC state as long as no errors are detected in a received data message. When an error is detected or corrected in a received data

A decoder is arranged to operate as a single-bit error correction circuit (ECC) and as a multiple-bit error detection circuit (EDC). The decoder starts and remains in the ECC state as long as no errors are detected in a received data message. When an error is detected or corrected in a received data message, the decoder switches to the EDC state where it remains as long as errors are detected in the received data message. When no errors are detected in the received data message, the decoder switches back to the ECC state. In a generalized multistate decoder, switching occurs from one state to another state, each state having a different error correcting capability, in response to a predetermined number of errors corrected or detected in the received data.

대표청구항 ▼

Apparatus for receiving input digital data coded using a predetermined error correction code, said apparatus comprising first means capable of correcting a first number of errors in the received data and capable of detecting errors in the received data at a first probability rate; second means capab

Apparatus for receiving input digital data coded using a predetermined error correction code, said apparatus comprising first means capable of correcting a first number of errors in the received data and capable of detecting errors in the received data at a first probability rate; second means capable of correcting a second number of errors in the received data, which is greater than said first number of errors, and capable of detecting errors in the received data at a second probability rate less than said first probability rate; means for deriving an error signal from said received data; and control means for applying said received data to said first means, and subsequently in response to said error signal indicating a first predetermined number of corrected errors in said received data, which is less than or equal to said first number, thereafter applying said received data to said second means, and thereafter in response to a subsequent error signal indicating a second predetermined number of corrected errors in said received data, which is less than or equal to said second number and greater than said first number, thereafter again applying said received data to said first means.