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특허 상세정보

Limited write non-volatile memory and a franking machine making use thereof

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) G07B-017/00   
미국특허분류(USC) 364/900 ; 364/46402 ; 377/16
출원번호 US-0174759 (1988-03-29)
우선권정보 FR-0004478 (1987-03-31)
발명자 / 주소
출원인 / 주소
인용정보 피인용 횟수 : 19  인용 특허 : 8
초록

The limited write non-volatile memory is characterized in that it is constituted by a limited memory space (1)in an EEPROM which is organized as a first zone (5) for recording the more significant bits of successive data sets at fixed addresses, and a second zone (6) for recording at least the remaining less significant bits of said data sets at addresses which change around a closed loop of addresses, said less significant bits being recorded with at least one redundancy bit which is common both to the more significant bits recorded in the first zone an...

대표
청구항

A franking machine including means that generate successive overall values of the franking operations performed, said franking machine including a limited-write non-volatile memory system for recording successive data sets each comprises m bits, and each having the possibility of being renewed R times the memory system comprising: a memory device which can be addressed for a maximum number E of times for written at each address, said memory having a limited memory space attributed to said data sets and defining a capacity which is less than the capacity ...

이 특허를 인용한 특허 피인용횟수: 19

  1. Majima, Taichi. Apparatus and method for transmitting or receiving data. USP2011098023585.
  2. Stancil Charles J.. Computer system with system ROM including serial-access PROM coupled to an auto-configuring memory controller and method. USP1999095951685.
  3. Stancil Charles J.. Computer system with system ROM including serial-access PROM coupled to an auto-configuring memory controller and method of shadowing BIOS code from PROM. USP2000086112303.
  4. Majima, Taichi. Device and method for correcting a data error in communication path. USP2013078494071.
  5. Majima, Taichi. Device and method for correcting a data error in communication path. USP2013078498355.
  6. Harari Eliyahou ; Norman Robert D. ; Mehrotra Sanjay. Flash EEprom system. USP2000116149316.
  7. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay. Flash EEprom system. USP2004066757842.
  8. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay. Flash EEprom system. USP2004016684345.
  9. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay. Flash EEprom system. USP2004076763480.
  10. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay. Flash EEprom system. USP2005076914846.
  11. Harari, Eliyahou; Norman, Robert D.; Mehrotra, Sanjay. Flash EEprom system. USP2003026523132.
  12. Harari,Eliyahou; Norman,Robert D.; Mehrotra,Sanjay. Flash EEprom system. USP2008077397713.
  13. Harari,Eliyahou; Norman,Robert D.; Mehrotra,Sanjay. Flash EEprom system. USP2009027492660.
  14. Harari, Eliyahou. Highly compact EPROM and flash EEPROM devices. USP2003056570790.
  15. Harari, Eliyahou. Highly compact EPROM and flash EEPROM devices. USP2005076914817.
  16. Matsufuji Katsuaki,JPX. Recording apparatus including a plurality of EEPROMS where parallel accessing is used. USP1998065761702.
  17. Majima, Taichi. Scrambler, scramble processing method, and program. USP2013038396219.
  18. Majima, Taichi. Scrambler, scramble processing method, and program. USP2013018363826.
  19. Tetard,Claude. System for statistical follow-up of postal products. USP2008037349855.