초록 ▼

A CCD imager cell (36, 38) is formed at a face of a semiconductor substrate (10) and has first (36) and second (38) phase regions. A first clocked well (14) is provided for receiving charge integrated in the first phase region (36). A second clocked well (16) is provided for receiving charge integra

A CCD imager cell (36, 38) is formed at a face of a semiconductor substrate (10) and has first (36) and second (38) phase regions. A first clocked well (14) is provided for receiving charge integrated in the first phase region (36). A second clocked well (16) is provided for receiving charge integrated in a second phase region (38) adjacent the first phase region (36). A first gate (20) is insulatively disposed over the first clocked well (14), and a second gate (22) is insulatively disposed over the second clocked well (16). A controller controls f1 and f2 pulses such that the charge is transferred from a selected one of the first and second clocked wells (14, 16) to the other, thus integrating all of the charge in the cell into one clocked well thereof. This unified charge is then transferred out from clocked well to clocked well.

대표청구항 ▼

A charge-coupled device imager cell formed in a semiconductor substrate comprising: adjacent first and second phase regions, each said phase region including a clocked region and a virtual region, said clocked region defined by a first series of dopants in said substrate, said virtual region defined

A charge-coupled device imager cell formed in a semiconductor substrate comprising: adjacent first and second phase regions, each said phase region including a clocked region and a virtual region, said clocked region defined by a first series of dopants in said substrate, said virtual region defined by a second series of dopants in said substrate and accumulating charge therein in response to incident light; a gate electrode insulatively disposed over each clocked region; antiblooming region in said substrate adjacent said clocked and virtual region and bordering said first and second phase regions; a controller for transferring the charge from the virtual region to the clocked region of each respective phase region and subsequently selectively transferring the charge in one said clocked region of one of said phase regions to another said selected region in an adjoining one of said phase regions by applying a predetermined voltage to a selected one of said gate electrodes; wherein said predetermined voltage applied to said selected one of said gate electrodes to transfer the charge from one said clocked region to another said clocked region disables said antiblooming region during transfer of the charge.