초록 ▼

A metal-insulator-semiconductor transistor comprises an insulator layer, a semiconductor body provided on the insulator layer and comprising a source region, a drain region and a channel region extending in a first direction between and interconnecting the source region and the drain region, a gate

A metal-insulator-semiconductor transistor comprises an insulator layer, a semiconductor body provided on the insulator layer and comprising a source region, a drain region and a channel region extending in a first direction between and interconnecting the source region and the drain region, a gate insulator film provided on the semiconductor body so as to cover the channel region except for the part of the channel region in contact with the insulator layer, and a gate electrode of a conductive material provided in contact with the gate insulator film so as to cover the channel region underneath the gate insulator film except for the part of the channel region in contact with the insulator layer. The channel region has a width substantially smaller than twice the maximum extension of the depletion region formed in the channel region.

대표청구항 ▼

A metal-insulator-semiconductor transistor, comprising: a substrate having a main surface; a semiconductor body provided on the substrate and having first and second regions doped to a first conductivity type and defining respective source and drain regions and a third region extending in a first di

A metal-insulator-semiconductor transistor, comprising: a substrate having a main surface; a semiconductor body provided on the substrate and having first and second regions doped to a first conductivity type and defining respective source and drain regions and a third region extending in a first direction between and electrically interconnecting the first and second regions and doped to a second conductivity type, opposite to the first conductivity type, the third region defining a channel region for conduction of carriers between the source and drain regions, the third, channel region of the semiconductor body having spaced side wall surfaces extending generally transversely to the main surface of the substrate and an upper surface extending in a plane substantially parallel to the main surface of the substrate, the channel region having a width WO between the sidewalls measured in a second direction, transverse to the first direction, and a sidewall height of WH; a gate insulator film formed on the upper and sidewall surfaces of the third, channel region of the semiconductor body; and a gate electrode, of a conducive material, formed on the gate insulator film in conformance with the upper surface and sidewall surfaces of the channel region as covered by the gate insulator film, a gate voltage applied to the gate electrode creating a depletion region in the channel region and wherein, where WMAX defines the maximum extension of the depletion region, in an inward direction from each of the sidewall and upper surfaces of the channel region and in a plane transverse to the first direction and parallel to the second direction, and determined as a function of the impurity concentration level in the channel region, the width WO of the third channel region is less than the height WH of the sidewalls thereof and sufficiently smaller than the maximum extension WMAX, as so determined, such that the channel region is fully depleted.