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Methods and apparatus for lowering integrated circuit (IC) chip ambient temperatures allow a slow IC chip to simulate a faster, functionally equivalent one for design testing purposes when the faster chip is not yet available. The cooling devices employed include a cryogenic chip cooling apparatus,

Methods and apparatus for lowering integrated circuit (IC) chip ambient temperatures allow a slow IC chip to simulate a faster, functionally equivalent one for design testing purposes when the faster chip is not yet available. The cooling devices employed include a cryogenic chip cooling apparatus, and a novel thermo-electric chip cooling apparatus using a directly water-cooled Peltier effect device attached to the surface of the IC chip.

대표청구항 ▼

An integrated circuit (IC) chip simulation method for simulating the operation of a first IC chip comprising the steps of: selecting a functionally equivalent second IC chip which operates at a slower speed than the speed at which said first IC chip operates (first chip normal speed) at the normal o

An integrated circuit (IC) chip simulation method for simulating the operation of a first IC chip comprising the steps of: selecting a functionally equivalent second IC chip which operates at a slower speed than the speed at which said first IC chip operates (first chip normal speed) at the normal operating temperature of said first IC chip; and cooling said second IC chip below said operating temperature until said second IC chip operates substantially at said first chip normal speed.